Results 61 to 70 of about 1,145 (180)

Narratives of Change or Changing the Narrative? An Exploration of Narratives in Rural Social Innovation

Sociologia Ruralis, Volume 65, Issue 3, July 2025.
ABSTRACT Social innovation (SI) has been conceptualised in the literature as changing social relations, involving new ways of doing, organising, framing and knowing. Of particular interest is that SI initiatives also engage in the construction of reality through new ways of framing and knowing through the narratives they construct and spread.
Marina Novikova
wiley   +1 more source

Realtime multiprocessor for mobile ad hoc networks [PDF]

Advances in Radio Science, 2008
This paper introduces a real-time Multiprocessor System-On-Chip (MPSoC) for low power wireless applications. The multiprocessor is based on eight 32bit RISC processors that are connected via an Network-On-Chip (NoC). The NoC follows a novel approach with
T. Jungeblut, M. Grünewald, M. Porrmann, U. Rückert   +3 more
doaj  

An Innovational Intermittent Algorithm In Networks-On-Chip (Noc)

, 2008
Every day human life experiences new equipments more automatic and with more abilities. So the need for faster processors doesn-t seem to finish. Despite new architectures and higher frequencies, a single processor is not adequate for many applications. Parallel processing and networks are previous solutions for this problem.
Shafiee, Ahmad M., Montazeri, Mehrdad, Nikdast, Mahdi   +2 more
openaire   +2 more sources

A Self-Adaptive Mapping Approach for Network on Chip With Low Power Consumption

IEEE Access, 2019
Application mapping of disseminated intellectual property into Network on Chip (NoC) is a well-defined NP-Hard problem. Improvement of network performance in NoC is purely based on an effective mapping approach with cost and performance metrics ...
Aravindhan Alagarsamy, Lakshminarayanan Gopalakrishnan, Sundarakannan Mahilmaran, Seok-Bum Ko   +3 more
doaj   +1 more source

Hybrid Network-on-Chip: An Application-Aware Framework for Big Data

Complexity, 2018
Burst growing IoT and cloud computing demand exascale computing systems with high performance and low power consumption to process massive amounts of data.
Juan Fang, Sitong Liu, Shijian Liu, Yanjin Cheng, Lu Yu   +4 more
doaj   +1 more source

SRCPAR—Spike Response-Based Congestion Prediction for Adaptive Routing for 2D NoCs

IEEE Access
Network-on-Chip (NoC) architectures offer several advantages over bus-based systems, including improved scalability, efficient and high-performance interconnects, reduced wire routing congestion, and enhanced power efficiency.
Rajendra Singh, Manoj Kumar Bohra, Ashish Sharma, Sourabh Singh Verma, Devershi Pallavi Bhatt, Amit Kumar Bairwa, Masoud Daneshtalab   +6 more
doaj   +1 more source

Expansible Network-on-Chip Architecture

Advances in Electrical and Computer Engineering, 2018
Interconnection has a great importance to provide a high bandwidth communication among parallel systems. On multi-core context, Network-on-Chip is the default intra-chip interconnection choice, providing low contention and high bandwidth between the ...
PIRES, I. L. P., ALVES, M. A. Z., ALBINI, L. C. P.   +2 more
doaj   +1 more source

Genetic algorithm for task mapping in embedded systems on a hierarchical architecture based on wireless network on chip WiNoC

Dyna, 2017
Network on Chip (NoC) systems were originally developed to provide high performance, using the availability of several processing units, connected to a wired network inside the integrated circuit.
Maribell Sacanamboy Franco, Freddy Bolaños-Martinez, Álvaro Bernal-Noreña, Rubén Nieto-Londoño   +3 more
doaj   +1 more source

Novel NoC Topology Construction for High-Performance Communications

Journal of Computer Networks and Communications, 2011
Different intellectual property (IP) cores, including processor and memory, are interconnected to build a typical system-on-chip (SoC) architecture. Larger SoC designs dictate the data communication to happen over the global interconnects.
P. Ezhumalai, A. Chilambuchelvan, C. Arun   +2 more
doaj   +1 more source

A comprehensive study and holistic review of empowering network-on-chip application mapping through machine learning techniques

Discover Electronics
This study investigates machine learning (ML) techniques for optimizing Network-on-Chip (NoC) application mapping, focusing on supervised learning, unsupervised learning, reinforcement learning, and neural networks.
Yasin Asadi
doaj   +1 more source