Results 61 to 70 of about 1,082 (135)
Hybrid Network-on-Chip: An Application-Aware Framework for Big Data
Burst growing IoT and cloud computing demand exascale computing systems with high performance and low power consumption to process massive amounts of data.
Juan Fang +4 more
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Expansible Network-on-Chip Architecture
Interconnection has a great importance to provide a high bandwidth communication among parallel systems. On multi-core context, Network-on-Chip is the default intra-chip interconnection choice, providing low contention and high bandwidth between the ...
PIRES, I. L. P. +2 more
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Network on Chip (NoC) systems were originally developed to provide high performance, using the availability of several processing units, connected to a wired network inside the integrated circuit.
Maribell Sacanamboy Franco +3 more
doaj +1 more source
Novel NoC Topology Construction for High-Performance Communications
Different intellectual property (IP) cores, including processor and memory, are interconnected to build a typical system-on-chip (SoC) architecture. Larger SoC designs dictate the data communication to happen over the global interconnects.
P. Ezhumalai +2 more
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The disparity between memory and CPU have been ameliorated by the introduction of Network-on-Chip-based Chip-Multiprocessors (NoC-based CMPS). However, power consumption continues to be an aggressive stumbling block halting the progress of technology ...
Emmanuel Ofori-Attah +2 more
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Abstracts submitted to the ‘EACR 2025 Congress: Innovative Cancer Science’, from 16–19 June 2025 and accepted by the Congress Organising Committee are published in this Supplement of Molecular Oncology, an affiliated journal of the European Association for Cancer Research (EACR).
wiley +1 more source
This paper presents the hardware architecture and the software abstraction layer of an adaptive multiclient Network-on-Chip (NoC) memory core. The memory core supports the flexibility of a heterogeneous FPGA-based runtime adaptive multiprocessor system ...
Diana Göhringer +5 more
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The application of the multistage interconnection networks (MINs) in systems-on-chip (SoC) and networks-on-chip (NoC) is hottest since year 2002. Nevertheless, nobody used them practically for parallel communication. However, to overcome all the previous
Nitin
doaj +1 more source
This study investigates machine learning (ML) techniques for optimizing Network-on-Chip (NoC) application mapping, focusing on supervised learning, unsupervised learning, reinforcement learning, and neural networks.
Yasin Asadi
doaj +1 more source
OSDTM: an Offline-Structural Distributed Test Mechanism for Data Links in NoC
The Micro Packet Switched based Network on Chip (NoC) is emerged to address traditional non-scalable buses-based Systems on Chip (SoC) challenges such as out of order transactions, flow control and higher latencies.
Babak Aghaei +4 more
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