Results 51 to 60 of about 10,864,876 (268)
Memristor-based Random Access Memory: The delayed switching effect could revolutionize memory design [PDF]
Memristor’s on/off resistance can naturally store binary bits for non-volatile memories. In this work, we found that memristor’s another peculiar feature that the switching takes place with a time delay (we name it “the delayed switching”) can be used to
Wang, Frank Z. +6 more
core +1 more source
Re‐Thinking Electronic Circuit Design Through Emerging Reconfigurable Field Effect Transistors
Graphical illustration of reconfigurable field effect transistor (RFET) operation modes, including n‐type, p‐type, and ambipolar transport, as well as their areas of application discussed in this review: digital circuit design, analog circuit design, post‐Shannon computing, and sensing. ABSTRACT Reconfigurable field‐effect transistors, short RFETs, are
Jens Trommer +19 more
wiley +1 more source
Robust and Compatible Ferroelectric Memories with Polycrystalline TiO2 Channel for 3D Integration
Robust and monolithic 3D compatible ferroelectric memories are realized using the polycrystalline TiO2 channel‐based FeFET. The review covers physical mechanisms of the TiO2 channel FeFET, quantitative benchmarking, and advanced planar/vertical architectures for monolithic 3D integration based on HfO2‐TiO2 gate stack, offering a roadmap for reliable ...
Xujin Song +10 more
wiley +1 more source
Model‐Based Time‐Modulated Write Algorithm for 1R Analog Memristive Crossbar Arrays
A novel model‐based time‐modulated write algorithm efficiently programs analog 1R memristive crossbar arrays by varying pulse duration at a fixed voltage. By leveraging a physics‐based compact model and a dynamic gain mechanism, this approach overcomes device nonlinearities and parasitic effects.
Richard Schroedter +7 more
wiley +1 more source
STT-RAM-based Hierarchical In-Memory Computing [PDF]
In-memory computing promises to overcome the von Neumann bottleneck in computer systems by performing computations directly within the memory. Previous research has suggested using Spin-Transfer Torque RAM (STT-RAM) for in-memory computing due to its non-
Gajaria, Dhruv +2 more
core +1 more source
Emerging Memory and Device Technologies for Hardware‐Accelerated Model Training and Inference
This review investigates the suitability of various emerging memory technologies as compute‐in‐memory hardware for artificial intelligence (AI) applications. Distinct requirements for training‐ and inference‐centric computing are discussed, spanning device physics, materials, and system integration.
Yoonho Cho +6 more
wiley +1 more source
TTEC: Data Allocation Optimization for Morphable Scratchpad Memory in Embedded Systems
Scratchpad memory (SPM) is widely utilized in many embedded systems as a software-controlled on-chip memory to replace the traditional cache. New non-volatile memory (NVM) has emerged as a promising candidate to replace SRAM in SPM, due to its ...
Linbo Long +3 more
doaj +1 more source
In this work, low‐resolution infrared imaging is combined with a 28 nm FeFET IMC architecture to enable compact, energy‐efficient edge inference. MLC FeFET devices are experimentally characterized, and controlled multi‐level current accumulation is validated at crossbar array level.
Alptekin Vardar +9 more
wiley +1 more source
The objective of this study was to determine the effects of replacing different levels of toasted Daniellia oliveri seed meal (TDS) for groundnut cake (GNC) in the diets of fifteen growing 8-month-old ram-lambs (13 ± 0.25 kg body weight (BW)) on growth ...
Sunday Adewale Okunade +1 more
doaj +1 more source

