Results 131 to 140 of about 8,490 (292)
Preparation of Remote Plasma Atomic Layer-Deposited HfO2 Thin Films with High Charge Trapping Densities and Their Application in Nonvolatile Memory Devices. [PDF]
Yoo JH +7 more
europepmc +1 more source
A non‐filamentary self‐rectifying HfO2/TiOx resistive random‐access memory integrates H2 annealing with an incremental step pulse with verify algorithm to achieve stable and linear analog conductance modulation. The device enables low‐current 6‐bit multilevel operation while suppressing sneak current in crossbar arrays. Implemented in Transformer‐based
Seonjeong Lee +5 more
wiley +1 more source
High-performance ferroelectric nonvolatile memory based on Gd-and Ni-codoped BiFeO3 films. [PDF]
Song Y, Wu Q, Jia C, Gao Z, Zhang W.
europepmc +1 more source
Hierarchical Multi‐Mode Computing in Interlayer‐Coupled 3D RRAM Crossbar Arrays
2‐deck RRAM crossbar array provides a versatile hardware platform for multifunctional in‐memory computing. Stacked, series, and entropy node configurations enable multi‐layer conductance modulation, logic‐in‐memory operation, genetic learning, and reconfigurable physical unclonable functions.
Seungman Park +7 more
wiley +1 more source
An antiferroelectric tunnel junction serves as a reservoir computing node, where field‐induced phase transitions and spontaneous ZrO2 relaxation deliver nonlinear fading memory. An In‐Ga‐Zn oxide interlayer enlarges the memory margin and multibit state richness.
Taegyu Kwon +13 more
wiley +1 more source
HfO2‐based ferroelectrics exhibit wake‐up and fatigue behaviors during electrical cycling, significantly affecting device endurance and reliability. These phenomena are governed by defect dynamics, including oxygen vacancy redistribution and charge trapping.
Hongseok Kim +6 more
wiley +1 more source
SONOS Nonvolatile Memory Cell Programming Characteristics [PDF]
Silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory is gaining favor over conventional EEPROM FLASH memory technology. This paper characterizes the SONOS write operation using a nonquasi-static MOSFET model.
Phillips, Thomas A. +2 more
core +1 more source
Low-voltage ultrafast nonvolatile memory via direct charge injection through a threshold resistive-switching layer. [PDF]
Li Y +8 more
europepmc +1 more source
Monolithic Co‐Integration of Vertical FET and Memristor for 1T1R Cell
This work demonstrates a vertically integrated one‐transistor–one‐memristor (1T1R) cell by stacking a MoS2 vertical field‐effect transistor (VFET) with a mortise–tenon‐shaped (MTS) memristor. This compact architecture not only exhibits highly uniform resistive switching characteristics but also provides a strategy for constructing densely packed ...
Fubo Jiao +15 more
wiley +1 more source
High Pressure Deuterium Passivation of Charge Trapping Layer for Nonvolatile Memory Applications. [PDF]
Sung JY +5 more
europepmc +1 more source

