Results 11 to 20 of about 1,751,371 (167)

Design Space Exploration of Ferroelectric Tunnel Junction Toward Crossbar Memories

open access: yesIEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2021
We perform a simulation-based analysis on the potential of emerging ferroelectric tunnel junctions (FTJs) as a memory device for crossbar arrays. Though FTJs are promising due to their low power switching characteristics compared to other emerging ...
Nicholas Jao   +4 more
doaj   +1 more source

Fixed charges at the HfO2/SiO2 interface: Impact on the memory window of FeFET

open access: yesMemories - Materials, Devices, Circuits and Systems, 2023
In this article, the impact of interfacial fixed charges on the memory window (MW) of HfO2-based ferroelectric field-effect transistor (FeFET) is investigated using technology computer-aided design (TCAD) device simulations.
Masud Rana Sk   +10 more
doaj   +1 more source

Demonstration of Differential Mode Ferroelectric Field‐Effect Transistor Array‐Based in‐Memory Computing Macro for Realizing Multiprecision Mixed‐Signal Artificial Intelligence Accelerator

open access: yesAdvanced Intelligent Systems, 2023
Harnessing multibit precision in nonvolatile memory (NVM)‐based synaptic core can accelerate multiply and accumulate (MAC) operation of deep neural network (DNN).
Vivek Parmar   +17 more
doaj   +1 more source

Quantization and sparsity-aware processing for energy-efficient NVM-based convolutional neural networks

open access: yesFrontiers in Electronics, 2022
Nonvolatile memory (NVM)-based convolutional neural networks (NvCNNs) have received widespread attention as a promising solution for hardware edge intelligence.
Han Bao   +9 more
doaj   +1 more source

Floating Gate Transistor‐Based Accurate Digital In‐Memory Computing for Deep Neural Networks

open access: yesAdvanced Intelligent Systems, 2022
To improve the computing speed and energy efficiency of deep neural network (DNN) applications, in‐memory computing with nonvolatile memory (NVM) is proposed to address the time‐consuming and energy‐hungry data shuttling issue.
Runze Han   +9 more
doaj   +1 more source

Low-Voltage Programmable Gate-All-Around (GAA) Nanosheet TFT Nonvolatile Memory Using Band-to-Band Tunneling Induced Hot Electron (BBHE) Method

open access: yesIEEE Journal of the Electron Devices Society, 2019
A low-voltage programmable gate-all-around (GAA) nanosheet poly-Si thin-film transistor (TFT) nonvolatile memory (NVM), which uses band-to-band tunneling induced hot electron (BBHE) programming, is demonstrated. The BBHE method is extremely efficient for
Lun-Chun Chen   +8 more
doaj   +1 more source

Resistive Switching and Synaptic Characteristics in ZnO/TaON-Based RRAM for Neuromorphic System

open access: yesNanomaterials, 2022
We fabricated an ITO/ZnO/TaON/TaN device as nonvolatile memory (NVM) with resistive switching for complementary metal-oxide-semiconductor (CMOS) compatibility. It is appropriate for the age of big data, which demands high speed and capacity.
Inho Oh, Juyeong Pyo, Sungjun Kim
doaj   +1 more source

Exploiting NVM in Large-scale Graph Analytics [PDF]

open access: yes, 2015
Data center applications like graph analytics require servers with ever larger memory capacities. DRAM scaling, how-ever, is not able to match the increasing demands for ca-pacity. Emerging byte-addressable, non-volatile memory technologies (NVM) offer a
Willy Zwaenepoel   +11 more
core   +2 more sources

Charge Storage Characteristics of Pi-Gate Poly-Si Nanowires TaN-Al2O3-Si3N4-SiO2-Si Flash Memory

open access: yesInternational Journal of Electrochemical Science, 2012
This work presents a novel TaN-Al2O3-Si3N4-SiO2-Silicon (TANOS) nonvolatile memory (NVM) with a structure that comprises Pi-gate (π-gate) nanowires (NWs) structure.
Yu-Hsien Lin   +3 more
doaj   +1 more source

Characterization of Programmable Charge-Trap Transistors (CTTs) in Standard 28-nm CMOS for Nonvolatile Memory and Analog Arithmetic Applications

open access: yesIEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2021
In this article, we characterized the charge trapping and detrapping behaviors of charge-trap transistors (CTTs) in standard 28-nm CMOS technology and formulated its programmable threshold voltage ( $V_{\mathrm {TH}}$ ).
Yuan Du   +4 more
doaj   +1 more source

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