Results 31 to 40 of about 1,751,371 (167)
Dynamic Data Allocation and Task Scheduling on Multiprocessor Systems With NVM-Based SPM
Low-power and short-latency memory access is critical to the performance of chip multiprocessor (CMP) system devices, especially to bridge the performance gap between memory and CPU.
Yan Wang, Kenli Li, Keqin Li
doaj +1 more source
High Performance MRAM with Spin-Transfer-Torque and Voltage-Controlled Magnetic Anisotropy Effects
The Internet of Things (IoTs) relies on efficient node memories to process data among sensors, cloud and RF front-end. Both mainstream and emerging memories have been developed to achieve this energy efficiency target.
Hao Cai +5 more
doaj +1 more source
Rejection Sampling Schemes for Extracting Uniform Distribution from Biased PUFs
This paper presents an efficient fuzzy extractor (FE) construction for secure cryptographic key generation from physically unclonable functions (PUFs).
Rei Ueno, Kohei Kazumori, Naofumi Homma
doaj +1 more source
Resistive memory devices are explored for operation at extremely low temperatures relevant to quantum computing. The study reveals how transistor behavior strongly influences memory performance under cryogenic conditions and introduces an optimized programming strategy.
Emilio Pérez‐Bosch Quesada +11 more
wiley +1 more source
Nonvolatile memory allocation and hierarchy optimization for high-level synthesis
The emerging nonvolatile memory (NVM) technology can potentially change the landscape of future IC designs with numerous benefits, such as high performance, low leakage power, and data retention.
Huazhong Yang +9 more
core +1 more source
Highly reconfigurable logic-in-memory (LIM) cells based on emerging HfO2-doped ferroelectric (FE) memory with multiple polarization states have received extensive attention in overcoming the bottleneck of a von Neumann architecture with flexible and ...
Wenwu Wang (4352767) +16 more
core +1 more source
In this work, low‐resolution infrared imaging is combined with a 28 nm FeFET IMC architecture to enable compact, energy‐efficient edge inference. MLC FeFET devices are experimentally characterized, and controlled multi‐level current accumulation is validated at crossbar array level.
Alptekin Vardar +9 more
wiley +1 more source
FIMA: A Scalable Ferroelectric Compute-in-Memory Annealer for Accelerating Boolean Satisfiability
In-memory compute kernels present a promising approach for addressing data-centric workloads. However, their scalability—particularly for computationally intensive tasks solving combinatorial optimization problems such as Boolean satisfiability ...
Mohammad Khairul Bashar +7 more
doaj +1 more source
Capacitive, charge‐domain compute‐in‐memory (CIM) stores weights as capacitance,eliminating DC sneak paths and IR‐drop, yielding near‐zero standbypower. In this perspective, we present a device to systems level performance analysis of most promising architectures and predict apathway for upscaling capacitive CIM for sustainable edge computing ...
Kapil Bhardwaj +2 more
wiley +1 more source
Adapting B+-Tree for Emerging Nonvolatile Memory-Based Main Memory
Among the emerging nonvolatile memory (NVM) technologies, some resistive memories, including phase change memory (PCM), spin-Transfer torque magnetic random access memory (STT-RAM), and metal-oxide resistive RAM (ReRAM), have been considered as promising
Chi, Ping, Lee, Wang Chien, Xie, Yuan
core +1 more source

