Results 11 to 20 of about 102 (93)

Oxygen Plasma‐Treated Dielectric‐Channel Interface for BEOL‐Compatible IGZO TFTs with High Electrical Stability

Advanced Electronic Materials
Indium gallium zinc oxide (IGZO) thin film transistors (TFTs) with high stability are highly desired for future memory devices, which demand high stabilities.
Shaocong Lv, Shuaiying Zheng, Xianglong Li, Tan Zhang, Baoqing Zhang, Huayu Feng, Fei Wang, Qian Xin, Yuxiang Li, Jiawei Zhang, Aimin Song   +10 more
doaj   +2 more sources

Re-Thinking Electronic Circuit Design Through Emerging Reconfigurable Field Effect Transistors. [PDF]

Adv Sci (Weinh)
Graphical illustration of reconfigurable field effect transistor (RFET) operation modes, including n‐type, p‐type, and ambipolar transport, as well as their areas of application discussed in this review: digital circuit design, analog circuit design, post‐Shannon computing, and sensing. ABSTRACT Reconfigurable field‐effect transistors, short RFETs, are
Trommer J, Martinez JP, He Y, Galderisi G, Pingen K, Oliveros-Mata ES, Tellis L, Cakirlar C, Beyer C, Sapui B, Knoch J, Hofmann K, Carrara S, Cantatore E, Lemme MC, O'Connor I, Kumar A, Heinzig A, Mikolajick T, Weber WM.   +19 more
europepmc   +2 more sources

Stacked Nanosheet Gate-All-Around Morphotropic Phase Boundary Field-Effect Transistors. [PDF]

Adv Sci (Weinh)
This study proposes a material design using ferroelectric‐antiferroelectric mixed‐phase HZO to achieve steep subthreshold swing and non‐hysteretic on‐current enhancement in morphotropic phase boundary field‐effect transistors (MPB‐FETs). For the first time, two‐stacked nanosheet GAA MPB‐FETs with optimized HZO are demonstrated, validating superior ...
Kim S, Kim HM, Kwon KR, Kwon D.
europepmc   +2 more sources

From Ferroelectric Material Optimization to Neuromorphic Devices

Advanced Materials, Volume 35, Issue 37, September 14, 2023., 2023
Ferroelectric materials combine a voltage driven switching mechanism with nonvolatility making them promising for nonvolatile devices. Here the material basics and the three different memory devices are described as a starting point for an in‐depth discussion of the current status of implementing ferroelectric devices for neuromorphic computing ...
Thomas Mikolajick, Min Hyuk Park, Laura Begon‐Lours, Stefan Slesazeck   +3 more
wiley   +1 more source

Impact of negative bias temperature instability on single event transients in scaled logic circuits

International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, Volume 34, Issue 3, May/June 2021., 2021
Abstract Altering the performance of single transistors and integrated circuits at nominal operating conditions over time, as well as soft errors, are serious reliability issues for integrated CMOS circuits, especially when used in space applications. In principle, the effect of soft errors becomes even more critical if the circuit performance degrades
Ambika Prasad Shah, Michael Waltl
wiley   +1 more source

Recycled integrated circuit detection using reliability analysis and machine learning algorithms

IET Computers &Digital Techniques, Volume 15, Issue 1, Page 20-35, January 2021., 2021
Abstract The use of counterfeit integrated circuits (ICs) in electronic products decreases its quality and lifetime. Recycled ICs can be detected by the method of aging analysis. Aging is carried out through reliability analysis with the effect of hot carrier injection and bias temperature instability (BTI). In this work, three machine learning methods,
Udaya Shankar Santhana Krishnan, Kalpana Palanisamy   +1 more
wiley   +1 more source

Characterization of High-Performance InGaAs QW-MOSFETs With Reliable Bi-Layer HfO_xN_y Gate Stack

IEEE Journal of the Electron Devices Society, 2019
In this work, we report high-performance InGaAs quantum-well MOSFETs with optimized bi-layer high-k gate dielectrics incorporating high-quality plasma-assisted atomic -layer-deposited (PA-ALD) HfOxNy interfacial layer (IL).
Su-Keun Eom, Min-Woo Kong, Ho-Young Cha, Kwang-Seok Seo   +3 more
doaj   +1 more source

As-grown-Generation (A-G) Model for Positive Bias Temperature Instability (PBTI)

, 2018
Positive Bias Temperature Instability (PBTI) is poised to cause significant degradation to nFETs with deep scaling into nanometers. It is commonly modelled by a power law fitted with measured threshold voltage shift. For the first time, this work shows that such models do not warrant PBTI prediction outside the stress conditions used for the fitting ...
Ji, Z, Gao, R, Zhang, JF, Marsland, J, Zhang, WD   +4 more
openaire   +1 more source

Analysis of Bias Temperature Instability in Peripheral CMOS Devices for Low-Temperature Memory Applications

IEEE Access
In this study, the bias temperature instability (BTI) of peripheral complementary metal–oxide semiconductor devices in a cell-on-peri (COP) structure is investigated under cryogenic conditions. First, positive BTI (PBTI) in the nMOSFET is found to
Jung Rae Cho, Seungwon Go, Jingyu Park, Tae Jun Yang, Seonhaeng Lee, Namhyun Lee, Dong Keun Lee, Yoon Kim, Myounggon Kang, Rock-Hyun Baek, Changhyun Kim, Sangwan Kim, Dae Hwan Kim   +12 more
doaj   +1 more source

Plasma‐Induced Damage on the Reliability of Hf‐Based High‐k/Dual Metal‐Gates Complementary Metal Oxide Semiconductor Technology

International Journal of Plasma Science and Engineering, Volume 2009, Issue 1, 2009., 2009
This study examines the effects of plasma‐induced damage (PID) on Hf‐based high‐k/dual metal‐gates transistors processed with advanced complementary metal‐oxide‐semiconductor (CMOS) technology. In addition to the gate dielectric degradations, this study demonstrates that thinning the gate dielectric reduces the impact of damage on transistor ...
Wu-Te Weng, Yao-Jen Lee, Horng-Chih Lin, Tiao-Yuan Huang, Paul K. Chu   +4 more
wiley   +1 more source