Results 11 to 20 of about 185,603 (251)
A Dynamic Instrumentation Amplifier for Low-Power and Low-Noise Biopotential Acquisition
Sensors, 2016 A low-power and low-noise dynamic instrumentation amplifier (IA) for biopotential acquisition is presented. A dynamic IA that can reduce power consumption with a timely piecewise power-gating method, and noise level with an alternating input and chopper ...
Jongpal Kim, Hyoungho Ko
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High-Performance and Area-Efficient Ferroelectric FET-Based Nonvolatile Flip-Flops
IEEE Access, 2021 Recently, nonvolatile systems with nonvolatile flip-flops (NVFFs) have gained prominence for their energy efficiency in energy-harvesting devices and battery-operated Internet of Things applications. They are normally-off instantly-on, and thus, can save
Sekeon Kim +4 more
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Gating of memory encoding of time-delayed cross-frequency MEG networks revealed by graph filtration based on persistent homology [PDF]
, 2017 To explain gating of memory encoding, magnetoencephalography (MEG) was analyzed over multi-regional network of negative correlations between alpha band power during cue (cue-alpha) and gamma band power during item presentation (item-gamma) in Remember (R)
Chung, Chun Kee +7 more
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Vector processing-aware advanced clock-gating techniques for low-power fused multiply-add [PDF]
, 2018 The need for power efficiency is driving a rethink of design decisions in processor architectures. While vector processors succeeded in the high-performance market in the past, they need a retailoring for the mobile market that they are entering now ...
Cristal Kestelman, Adrián +5 more
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Design of Ternary Content-Addressable Memories with Dynamically Power-gated Storage Cells Using FinFETs [PDF]
Electronics, 2016 An independent-gate FinFET can operate in two modes: SG (shorted-gate) and IG (independent-gate) modes, and thus a FinFET-based circuit offers rich design options for lower power, better performance or reduced transistor count.
Meng-Chou Chang +2 more
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Sensors, 2021 The goal of this paper is to present a compact low-cost and low-power prototype of a pulsed Ultra Wide Band (UWB) oscillator and an UWB elliptical dipole antenna integrated on the same Radio Frequency (RF) Printed Circuit Board (PCB) and its digital ...
Stefano Bottigliero, Riccardo Maggiora
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IEEE Open Journal of Circuits and Systems, 2021 An ultralow-voltage retention SRAM (ULVR-SRAM) cell using header and footer power-switches (HFPSs) is investigated for power-gating (PG) applications.
Hayato Yoshida +4 more
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Data-Width-Driven Power Gating of Integer Arithmetic Circuits [PDF]
, 2012 When performing narrow-width computations, power gating of unused arithmetic circuit portions can significantly reduce leakage power. We deploy coarse-grain power gating in 32-bit integer arithmetic circuits that frequently will operate on narrow-width ...
Hoang-Thanh, Tung, Larsson-Edefors, Per
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CMOS Technology for Increasing Efficiency of Clock Gating Techniques Using Tri-State Buffer
Walailak Journal of Science and Technology, 2016 Clock gating is an effective technique of decreasing dynamic power dissipation in synchronous design. One of the methods used to realize this goal is to mask the clock which goes to the unnecessary to use in specific time.
Maan HAMEED +3 more
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Applying Partial Power-Gating to Direction-Sliced Network-on-Chip
Journal of Electrical and Computer Engineering, 2015 Network-on-Chip (NoC) is one of critical communication architectures for future many-core systems. As technology is continually scaling down, on-chip network meets the increasing leakage power crisis. As a leakage power mitigation technique, power-gating
Feng Wang, Xiantuo Tang, Zuocheng Xing
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