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Technology development for the radiation hardening of robots

Proceedings 1999 IEEE/RSJ International Conference on Intelligent Robots and Systems. Human and Environment Friendly Robots with High Intelligence and Emotional Quotients (Cat. No.99CH36289), 2003
A radiation tolerant KAEROT/m2 system is being developed by a team composed of engineers and scientists from the Korea Atomic Energy Research Institute (KAERI) and Inventors' Enterprise Inc. The team is developing radiation tolerant data acquisition and control boards for CANDU reactor inspection. This paper outlines the work performed to harden a data
O. U. Youk   +4 more
openaire   +1 more source

Radiation Hardened by Design

2015
The major work introduced in this book is to develop a megagray-radiation-tolerant ps-resolution time-to-digital converter (TDC) for a light detection and ranging (LIDAR) application. In this chapter, major radiation effects in complementary metal–oxide–semiconductor (CMOS) integrated circuits (ICs) are introduced. The total ionizing dose (TID) effects
Ying Cao, Paul Leroux, Michiel Steyaert
openaire   +1 more source

Nonvolatile radiation hardened DICE latch

2015 15th Non-Volatile Memory Technology Symposium (NVMTS), 2015
Spintronic-based integrated circuits have been widely considered as potential candidates for space application, due to the fact that their core devices (e.g. magnetic tunnel junction, MTJ) are intrinsic insensitive to radiation effects. However, their CMOS peripheral circuits are still vulnerable to radiation effects.
Tingting Pang   +5 more
openaire   +1 more source

Transistor sizing for radiation hardening

2004 IEEE International Reliability Physics Symposium. Proceedings, 2004
This paper presents an efficient and accurate numerical analysis technique to simulate single event upsets (SEUs) in logic circuits. Experimental results that show the method is accurate to within 10% of the results obtained using SPICE are provided.
null Quming Zhou, K. Mohanram
openaire   +1 more source

On the saturation of radiation hardening

Physics Letters A, 1969
Abstract A model of saturation of radiation hardening is given. This model suggests that saturation of the thermal hardening component should occur at different fluence levels than would the athermal component.
openaire   +1 more source

Radiation Hardened by Design Sense Amplifier

2019
This paper presents a fully symmetrical radiation hardened sense amplifier is designed in and 32 nm FinFET Double gate PTM technology to tolerate single node upset and multiple-node upset.circuit. A 9 pC charge is used at critical node of the sense amplifier to analyse Single Event Transient.
Avinash Verma, Gaurav Kaushal
openaire   +1 more source

Radiation Hardening by Process

2017
This chapter describes the approaches for optimization of semiconductor device fabrication processes and structures to mitigate radiation effects in advanced silicon-based technologies, primarily complementary metal oxide semiconductor (CMOS). It discusses effects and mitigation approaches related to insulators, active device regions, and process ...
openaire   +1 more source

Radiation-hardened microelectronics for accelerators

IEEE Transactions on Nuclear Science, 1988
Ionization and displacement phenomena in semiconducting materials are reviewed. How these basic effects lead to changes in the electrical characteristics of transistors and diodes and the functionality of integrated circuits are discussed. The fundamental radiation limits for various semiconductor technologies are summarized.
J.E. Gover, T.A. Fischer
openaire   +1 more source

Radiation Hardening Applications

1972
Two approaches to the fabrication of radiation-hard dielectrics, utilizing silicon nitride, have been studied; silicon nitride sandwich structure and silicon oxynitride. Radiation-resistant devices investigated to date have included capacitors (MNS and MNOS), MNOS-FETs, bipolar transistors and operational amplifiers.
openaire   +1 more source

Radiation Hardened CMOS/SOS

IEEE Transactions on Nuclear Science, 1975
This paper reports the results of experiments designed to optimize the total dose ionizing radiation hardness of CMOS/SOS devices. Type 4007 inverter circuits were fabricated with variations in the process, including wet versus dry gate oxidation. Tolerable values (e. g.
K. G. Aubuchon, E. Harari
openaire   +1 more source

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