Results 51 to 60 of about 9,355 (180)
Analysis of the Electrical ReRAM Device Degradation Induced by Thermal Cross‐Talk
A switching of resistive memory cells leads to a local accumulation of Joules heat in the device. In resistive RAM (ReRAM) arrays, the heat generated in one cell spreads via common electrode metal lines to the neighboring cells and may cause their ...
Mohammad Al‐Mamun +2 more
doaj +1 more source
ReRAM/CMOS Array Integration and Characterization via Design of Experiments
This paper proposes the Design of Experiments to characterize arrays of oxide‐based ReRAM devices by exploring the large characterization space efficiently using only a few numbers of experiments. Using in‐house integration of 20 000 ReRAM devices on a CMOS chip, the unconventional optimization approach determines optimized measurement parameters and ...
Imtiaz Hossen +7 more
wiley +1 more source
Studies of resistance switching effects in metal/YBa2Cu3O7-x interface junctions
Current-voltage characteristics of planar junctions formed by an epitaxial c-axis oriented YBa2Cu3O7-x thin film micro-bridge and Ag counter-electrode were measured in the temperature range from 4.2 K to 300 K.
A. Plecenik +30 more
core +1 more source
A physics‐based compact model for Conductive‐Metal‐Oxide/HfOx ReRAM, accounting for ion dynamics, electronic conduction, and thermal effects, is presented. Accurate and versatile simulations of analog non‐volatile conductance modulation and memory state stabilization enable reliable circuit‐level studies, advancing the optimization of neuromorphic and ...
Matteo Galetta +9 more
wiley +1 more source
Neural network learning using non-ideal resistive memory devices
We demonstrate a modified stochastic gradient (Tiki-Taka v2 or TTv2) algorithm for deep learning network training in a cross-bar array architecture based on ReRAM cells.
Youngseok Kim +9 more
doaj +1 more source
Resistive communications based on neuristors
Memristors are passive elements that allow us to store information using a single element per bit. However, this is not the only utility of the memristor.
Pizzo, David Alejandro Trejo
core +1 more source
RRAM Variability Harvesting for CIM‐Integrated TRNG
This work demonstrates a compute‐in‐memory‐compatible true random number generator that harvests intrinsic cycle‐to‐cycle variability from a 1T1R RRAM array. Parallel entropy extraction enables high‐throughput bit generation without dedicated circuits. This approach achieves NIST‐compliant randomness and low per‐bit energy, offering a scalable hardware
Ankit Bende +4 more
wiley +1 more source
ReGra: Accelerating Graph Traversal Applications Using ReRAM With Lower Communication Cost
There is a growing gap between data explosion speed and the improvement of graph processing systems on conventional architectures. The main reason lies in the large overhead of random access and data movement, as well as the unbalanced and unordered ...
Haoqiang Liu +3 more
doaj +1 more source
Memristive devices are the subject of extensive studies nowadays. While the Dynamic Route Map is a powerful tool for analyzing the response of first-order memristors under DC stimuli, the development of an equivalent tool for investigating the response ...
A. Ascoli +5 more
doaj +1 more source
Low‐Power Control Of Resistance Switching Transitions in First‐Order Memristors
Joule losses are a serious concern in modern integrated circuit design. In this regard, minimizing the energy necessary for programming memristors should be handled with care. This manuscript presents an optimal control framework, allowing to derive energy‐efficient programming voltage protocols for resistance switching devices. Following this approach,
Valeriy A. Slipko +3 more
wiley +1 more source

