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Flexible and lead-free halide perovskite ReRAM: Toward sustainable and adaptive memory devices

Materials Today Sustainability
Halide perovskite-based resistive random-access memory (ReRAM), a next-generation non-volatile memory option, has attracted a lot of attention due to the search for environmentally friendly and adaptive electronics.
Geon Kim, Hyojung Kim
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ReRAM: History, Status, and Future

IEEE Transactions on Electron Devices, 2020
This article reviews the resistive random-access memory (ReRAM) technology initialization back in the 1960s and its heavily focused research and development from the early 2000s. This review goes through various oxygen/oxygen vacancy and metal-ion-based ReRAM devices and their operation mechanisms. This review also benchmarks the performance of various
Yangyin Chen
exaly   +2 more sources

Automatic ReRAM SPICE Model Generation From Empirical Data for Fast ReRAM-Circuit Coevaluation

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017
This paper presents an automatic resistive random access memory (ReRAM) SPICE model generator, which enables fast ReRAM circuit evaluation with standard SPICE. Our model generator automatically produces SPICE models of ReRAM devices and selectors from the measured ${I}$ – ${V}$ data to reduce too much time consumption in manual model ...
Kwangmin Kim, Sangheon Lee, Byungsub Kim   +2 more
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Modeling and design optimization of ReRAM

The 20th Asia and South Pacific Design Automation Conference, 2015
Resistive switching memories (ReRAM) have been widely studied for applications in next-generation data storage and neurormorphic computing systems. To enable device-circuit-system co-design and optimization, a SPICE model of ReRAM that can reproduce the device characteristics in circuit simulations is needed.
Jinfeng Kang, Haitong Li, Peng Huang 0004, Zhe Chen, Bin Gao 0006, Xiaoyan Liu, Zizhen Jiang, H.-S. Philip Wong   +7 more
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Tiered-ReRAM: A Low Latency and Energy Efficient TLC Crossbar ReRAM Architecture

2019 35th Symposium on Mass Storage Systems and Technologies (MSST), 2019
Resistive Memory (ReRAM) is promising to be used as high density storage-class memory by employing Triple-Level Cell (TLC) and crossbar structures. However, TLC crossbar ReRAM suffers from high write latency and energy due to the IR drop issue and the iterative program-and-verify procedure.
Yang Zhang 0051, Dan Feng 0001, Wei Tong 0001, Jingning Liu, Chengning Wang, Jie Xu 0013   +5 more
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Learning the sparsity for ReRAM

Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019
With the in-memory processing ability, ReRAM based computing gets more and more attractive for accelerating neural networks (NNs). However, most ReRAM based accelerators cannot support efficient mapping for sparse NN, and we need to map the whole dense matrix onto ReRAM crossbar array to achieve O(1) computation complexity.
Jilan Lin, Zhenhua Zhu 0002, Yu Wang 0002, Yuan Xie 0001   +3 more
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On the origin of the fading memory effect in ReRAMs

2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2017
Redox-based resistive switching devices can be switched between a high resistance state and a low resistance state in a reversible manner. An important requirement is the stable operation between these two states for a high amount of switching cycles.
S. Menzel, R. Waser, A. Siemon, C. La Torre, M. Schulten, R. Waser, A. Ascoli, R. Tetzlaff   +7 more
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ReRAM-Sharing: Fine-Grained Weight Sharing for ReRAM-Based Deep Neural Network Accelerator

2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021
Deep Neural Networks (DNNs) have gained a strong momentum across various applications in recent years. Meanwhile, they are compute- and memory-intensive as the deep layers induce massive matrix-multiplication operations. The Resistive Random Access Memory (ReRAM) can naturally carry out the matrix-multiplication in memory.
Zhuoran Song, Dongyue Li, Zhezhi He, Xiaoyao Liang, Li Jiang 0002   +4 more
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Tileable Monolithic ReRAM Memory Design

2020 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS), 2020
Non-volatile memory, such as resistive RAM (ReRAM), is compatible with standard CMOS logic processes, allowing a sizable main memory system to be integrated into a CPU’s die. ReRAM bitcells are fabricated within crosspoint sub-arrays that leave the bulk of transistors underneath the sub-arrays vacant.
Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung   +7 more
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Leveraging Capacitance Modulation of ReRAM for CMOS-ReRAM Image Sensor

2025 Device Research Conference (DRC)
The rapid expansion of applications in the Internet of Things, biomedical imaging, unmanned aerial vehicle imaging, and smart devices drives the increasing demand for advanced image sensors. Conventional CMOS image sensors (CIS) are widely employed in these domains but are limited by their relatively low dynamic range (DR).
Chourasia, S., Pande, S., Padovani, A., Chakrabarti, B.   +3 more
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