Results 181 to 190 of about 14,872,237 (221)

Electrothermal Modeling and Simulation of Resistive Random Access Memory (RRAM) with Different Resistive Switching Oxides

2020 IEEE International Conference on Computational Electromagnetics (ICCEM), 2020
Electrothermal performance of Resistive Random Access Memory (RRAM) composed of five different resistive switching oxides is studied numerically in this paper. Finite element method-based parallel computing simulator is employed to conduct the electrothermal simulation of both RRAM cell and array.
Tan-Yi Li, Da-Wei Wang, Sichao Du, Wenchao Chen, Wen-Yan Yin   +4 more
openaire   +1 more source

Dimensional Effect of Non-Polar Resistive Random Access Memory (RRAM) for Low-Power Memory Application

Journal of Nanoscience and Nanotechnology, 2012
The relationships between the resistive cell dimension and the related analytical parameters such as the forming voltage, set voltage, and reset current were investigated to implement high-density and low-power unipolar RRAM. It was shown that the formation process in unipolar switching is strongly related to the cell dimension in the sub-nm region ...
Kyung-Chang, Ryoo, Jeong-Hoon, Oh, Sunghun, Jung, Hongsik, Jeong, Byung-Gook, Park   +4 more
openaire   +2 more sources

Simulation study of dimensional effect on bipolar resistive random access memory (RRAM)

2013 IEEE 5th International Nanoelectronics Conference (INEC), 2013
The dependency of the RRAM device electrical parameters such as set voltage, reset current and resistance on the RRAM cell dimensional scalability is investigated with Monte Carlo simulation to optimize the power consumption of bipolar RRAM. It is found in the simulation that the switching process in bipolar RRAM is related to the cell dimension in the
Liu Kai, Zhang Kailiang, Wang Fang, Zhao Jinshi, Wei Jun   +4 more
openaire   +1 more source

Verilog-A compact model for oxide-based resistive random access memory (RRAM)

2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), 2014
We demonstrate a dynamic Verilog-A RRAM compact model capable of simulating real-time DC cycling and pulsed operation device behavior, including random variability that is inherent to RRAM. This paper illustrates the physics and capabilities of the model. The model is verified using different sets of experimental data.
Zizhen Jiang, Shimeng Yu, Yi Wu, Jesse H. Engel, Ximeng Guan, H.-S. Philip Wong   +5 more
openaire   +1 more source

Invited talk: Resistive random access memory (RRAM): Materials and devices

2013 IEEE Workshop on Microelectronics and Electron Devices (WMED), 2013
Summary form only given. Nanoscale resistive memories (RRAMs) have generated extensive interest recently as a promising candidate for future non-volatile memory applications. In this talk, I will briefly summarize the current status of RRAM research, from the switching mechanism, modeling, material choice, performance metrics, to prototype memory ...
openaire   +1 more source

A Novel March C2RR Algorithm for Nanoelectronic Resistive Random Access Memory (RRAM) Testing

2019
Promising nanoelectronic memories such as PCRAM, STT-RAM, Ferroelectric FET Memory and Resistive Random Access Memory (RRAM) are capable of substituting the conventional memory technologies such as SRAMs, DRAMs and flash memory in future computers. Among all these nanoelectronic memories RRAM results in higher density, lower power consumption, higher ...
H. Sribhuvaneshwari, K. Suthendran 0001
openaire   +2 more sources

Novel colossal magnetoresistive thin film nonvolatile resistance random access memory (RRAM)

Digest. International Electron Devices Meeting,, 2003
A novel nonvolatile memory Colossal Magnetoresistive (CMR) thin film resistor for Resistance RAM (RRAM) application has been characterized. A 1RIT RRAM test circuit based on 0.5 /spl mu/m CMOS has been fabricated. RRAM is a low power high-speed memory technology. The memory cell programming pulse is less than 5 V and pulse width as narrow as 10 ns. The
W.W. Zhuang, W. Pan, B.D. Ulrich, J.J. Lee, L. Stecker, A. Burmaster, D.R. Evans, S.T. Hsu, M. Tajiri, A. Shimaoka, K. Inoue, T. Naka, N. Awaya, A. Sakiyama, Y. Wang, S.Q. Liu, N.J. Wu, A. Ignatiev   +17 more
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Multi-Level Operation of Fully CMOS Compatible WOX Resistive Random Access Memory (RRAM)

2009 IEEE International Memory Workshop, 2009
The multi-level operation of WO x based RRAM has been investigated. Improvement of our WO x process has produced an extended linear R-V region for our devices. By adding an electrical forming process and a program-verify algorithm we have demonstrated stable 2-bit/cell operation, with potential for 3-bit/cell.
W. C. Chien, Y. C. Chen, K. P. Chang, E. K. Lai, Y. D. Yao, P. Lin, J. Gong, S. C. Tsai, S. H. Hsieh, C. F. Chen, K. Y. Hsieh, R. Liu, Chih-Yuan Lu   +12 more
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Fully coupled electrothermal simulation of resistive random access memory (RRAM) array

Science China Information Sciences, 2020
Da-Wei Wang 0003, Wen-Sheng Zhao, Wenchao Chen, Hao Xie, Wen-Yan Yin   +4 more
openaire   +1 more source

Periodic Analysis of Resistive Random Access Memory (RRAM)-Based Swish Activation Function

SN Computer Science, 2022
Afroz Fatima, Abhijit Pethe
openaire   +2 more sources