Results 171 to 180 of about 16,903,176 (225)

Area-Selective Atomic Layer Deposition for Next-Generation Semiconductor Processing: Mechanisms of Selectivity Breakdown and Process Integration Strategies. [PDF]

Micromachines (Basel)
Park Y, Kim S, Shin J, Park E, Pyo SG.
europepmc   +1 more source

Investigation of key performance metrics in TiO_X/TiN based resistive random-access memory cells. [PDF]

Sci Rep
Zink BR, Borders WA, Madhavan A, Hoskins BD, McClelland J.   +4 more
europepmc   +1 more source

A hardware demonstration of a universal programmable RRAM-based probabilistic computer for molecular docking. [PDF]

Nat Commun
He Y, Hong MC, Ding Q, Lin CS, Lai CM, Fang C, Gong X, Hou TH, Liang G.   +8 more
europepmc   +1 more source

Impact of Reset Pulse Width on Gradual Conductance Programming in Al₂O₃/TiO_x-Based RRAM. [PDF]

Micromachines (Basel)
Lim H, Shim W, Kim TH.
europepmc   +1 more source

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Recent Progress of Resistive Switching Random Access Memory (RRAM)

2012 IEEE Silicon Nanoelectronics Workshop (SNW), 2012
This paper gives an overview of recent works on metal oxide resistive switching memory (RRAM). We explored the stochastic nature of resistive switching in metal oxide RRAM and a 2-D analytical solver was established to explain the switching parameter variations in HfOx-based RRAM.
Shimeng Yu, Hon-Sum Philip Wong, Ximeng Guan   +2 more
exaly   +2 more sources

Verilog-A Compact Model for Oxide-Based Resistive Random Access Memory (RRAM)

2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), 2014
We demonstrate a dynamic Verilog-A RRAM compact model capable of simulating real-time DC cycling and pulsed operation device behavior, including random variability that is inherent to RRAM. This paper illustrates the physics and capabilities of the model. The model is verified using different sets of experimental data.
Shimeng Yu, Hon-Sum Philip Wong, Zizhen Jiang   +2 more
exaly   +2 more sources

Resistive Random Access Memory (RRAM)

Synthesis Lectures on Emerging Engineering Technologies, 2016
Shimeng Yu
exaly   +2 more sources

Metal Oxide Resistive Random Access Memory (RRAM) Technology

2014
D C Gilmer, G Bersuker
exaly   +2 more sources

Access Strategies for Resistive Random Access Memory (RRAM)

ECS Transactions, 2012
In an RRAM array, it is important to avoid sneak current paths that result in inadvertent, non-negligible voltage and current inputs to unselected cells. At the same time, care must be taken not to allow excessive voltages or currents to selected cells, which could result in damage.
Frederick T. Chen, Yu-Sheng Chen, Heng-Yuan Lee, Wei-Su Chen, Pei-Yi Gu, Tai-Yuan Wu, Chen-Han Tsai, Yi-Ying Liao, Pang-Shiu Chen, Shyh-Shyuan Sheu, Pi-Feng Chiu, Wen-Ping Lin, Chih-He Lin, Ming-Jinn Tsai, Tzu-Kun Ku   +14 more
openaire   +1 more source

Switching in polymeric resistance random-access memories (RRAMS)

Organic Electronics, 2008
Resistive switching in aluminum-polymer-based diodes has been investigated using small signal impedance measurements. It is shown that switching is a two-step process. In the first step, the device remains highly resistive but the low frequency capacitance increases by orders of magnitude. In the second step, resistive switching takes place.
Gomes, Henrique L., Benvenho, A. R. V., De Leeuw, Dago M., Cölle, M., Stallinga, Peter, Verbakel, F., Taylor, D. M.   +6 more
openaire   +3 more sources