Results 21 to 30 of about 13,809 (235)
Symmetric Cryptography on RISC-V: Performance Evaluation of Standardized Algorithms
Cryptography, 2022 The ever-increasing need for securing computing systems using cryptographic algorithms is spurring interest in the efficient implementation of common algorithms.
Görkem Nişancı +2 more
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A Unified PUF and Crypto Core Exploiting the Metastability in Latches
Future Internet, 2022 Hardware acceleration of cryptography algorithms represents an emerging approach to obtain benefits in terms of speed and side-channel resistance compared to software implementations.
Ronaldo Serrano +5 more
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Advanced Embedded System Modeling and Simulation in an Open Source RISC-V Virtual Prototype
Journal of Low Power Electronics and Applications, 2022 RISC-V is a modern Instruction Set Architecture (ISA) that, by its open nature in combination with a clean and modular design, has enormous potential to become a game changer in the Internet of Things (IoT) era. Recently, SystemC-based Virtual Prototypes
Pascal Pieper +2 more
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Design of SoC System for Convolution Acceleration Based on RISC-V Processor [PDF]
Jisuanji gongcheng, 2021 To improve the computation and energy efficiency of Convolutional Neural Network(CNN),this paper proposes a convolution accelerator with 8 bit fixed-point data as input.The accelerator supports common CNN calculations,including activation,Batch ...
ZHANG Kunning, ZHAO Shuo, HE Hu, DENG Ning, YANG Xu
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The design of scalar AES Instruction Set Extensions for RISC-V
Transactions on Cryptographic Hardware and Embedded Systems, 2020 Secure, efficient execution of AES is an essential requirement on most computing platforms. Dedicated Instruction Set Extensions (ISEs) are often included for this purpose. RISC-V is a (relatively) new ISA that lacks such a standardized ISE.
Ben Marshall +4 more
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Taking on RISC for Energy-Efficient Computing in HEP [PDF]
EPJ Web of ConferencesIn pursuit of energy-efficient solutions for computing in High Energy Physics (HEP) we have extended our investigations of non-x86 architectures beyond the ARM platforms that we have previously studied. In this work, we have taken a first look at the RISC-V
Simili Emanuele +6 more
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Optimized Implementation of PIPO Block Cipher on 32-Bit ARM and RISC-V Processors
IEEE Access, 2022 A lightweight block cipher PIPO-64/128 was presented in ICISC’2020. PIPO of the 8-bit unit using an unbalanced-bridge S-box showed better performance than other lightweight block cipher algorithms on an 8-bit AVR environment.
Youngbeom Kim, Seog Chung Seo
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RISC-V: #AlphanumericShellcoding
, 2019 25 pages, originally published at WOOT ...
Barral, Hadrien +3 more
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An ultra-low-power processor pipeline-structure
Dianzi Jishu Yingyong, 2019 With the rapid development of communication and chip technology, IoT will be an important part of the next generation of information technology, a powerful driving force to promote the intelligent process of our lives. Among the IoT terminal applications,
Deng Tianchuan, Hu Zhenbo
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The RISC-V FPGA (RVfpga) Teaching Package
IEEE AccessRISC-V is a free and open-standard ISA based on RISC principles, allowing anyone to design, manufacture, and sell RISC-V chips and software. Its flexibility and growing ecosystem have made it popular in research, education, and industry, increasing the ...
Daniel Chaver +17 more
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