Results 41 to 50 of about 3,944,515 (307)
This Special Issue is dedicated to recent research in the field of compact modelling for circuit design. The topics included all device structures, provided it was demonstrated thet the presented compact modelling solutions were implementable in circuit ...
Benjamin Iniguez +3 more
doaj +1 more source
Entropy‐Driven Design of Low‐Melting‐Point Alloys via Compositionally Complex Strategy
Conventional low‐melting‐point alloys (LMPAs) are limited by a narrow compositional space and inherent property trade‐offs. This review presents an entropy‐driven design strategy that overcomes these limitations, ushering in a new class of low‐melting‐point compositionally complex alloys (LMCCAs).
Yinghui Shang +6 more
wiley +1 more source
Enhanced Radiation-Induced Narrow Channel Effects in Commercial 0.18 μm Bulk Technology [PDF]
Total ionizing dose effects are investigated in input/output transistors that are fabricated by using a commercial 0.18 μm bulk process. An enhanced radiation-induced narrow channel effect is demonstrated in N-type metal-oxide semiconductor (NMOS) and P ...
Goiffon, Vincent +14 more
core +1 more source
Gallium microalloying redirects interfacial reactions in low‐temperature Bi–Sn solders from Cu–Sn toward Cu–Ga intermetallic formation. The resulting Cu–Ga layer suppresses intermetallic growth during thermal aging, alters fracture pathways, and improves interfacial stability.
Iva Králová +6 more
wiley +1 more source
Amorphous oxide semiconductor (AOS) field-effect transistors (FETs) have been integrated with complementary metal-oxide-semiconductor (CMOS) circuitry in the back end of line (BEOL) CMOS process; they are promising devices creating new and various ...
Donguk Kim +13 more
doaj +1 more source
An all‐in‐one analog AI accelerator is presented, enabling on‐chip training, weight retention, and long‐term inference acceleration. It leverages a BEOL‐integrated CMO/HfOx ReRAM array with low‐voltage operation (<1.5 V), multi‐bit capability over 32 states, low programming noise (10 nS), and near‐ideal weight transfer.
Donato Francesco Falcone +11 more
wiley +1 more source
In recent years, advances in optoelectronics and electronics have prioritized optimizing semiconductor device performance and reducing power consumption by modeling new semiconductor device geometries.
Jo`shqin Sh. Abdullayev +1 more
doaj +1 more source
Edible electronics needs integrated logic circuits for computation and control. This work presents a potentially edible printed chitosan‐gated transistor with a design optimized for integration in circuits. Its implementation in integrated logic gates and circuits operating at low voltage (0.7 V) is demonstrated, as well as the compatibility with an ...
Giulia Coco +8 more
wiley +1 more source
Large-Scale Training in Neural Compact Models for Accurate and Adaptable MOSFET Simulation
We address the challenges associated with traditional analytical models, such as BSIM, in semiconductor device modeling. These models often face limitations in accurately representing the complex behaviors of miniaturized devices.
Chanwoo Park +7 more
doaj +1 more source
Control of Polarization and Polar Helicity in BiFeO3 by Epitaxial Strain and Interfacial Chemistry
In BiFeO3 thin films, the interplay of interfacial chemistry, electrostatics, and epitaxial strain is engineered to stabilize homohelicity in polarization textures at the domain scale. The synergistic use of a Bi2O2‐terminated Aurivillius buffer layer and a highly anisotropic compressive epitaxial strain offers new routes to control the polar‐texture ...
Elzbieta Gradauskaite +5 more
wiley +1 more source

