Results 1 to 10 of about 11,158 (155)

Adaptive reinforcement learning for lithography optimization: a scalable AI-driven solution for next-generation semiconductor manufacturing [PDF]

Scientific Reports
Semiconductor lithography, a pivotal process in integrated circuit (IC) fabrication, accounts for approximately 30% of production costs and faces significant challenges as feature sizes shrink to sub-nanometer scales.
Umar Rashid, Fahad Shafique, Hamza Atif, Waleed Waheed, Rizwan Khan, Muhammad Akmal   +5 more
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Shadow-wall lithography of ballistic superconductor–semiconductor quantum devices [PDF]

Nature Communications, 2021
Advanced fabrication techniques enable a wide range of quantum devices, such as the realization of a topological qubit. Here, the authors introduce an on-chip fabrication technique based on shadow walls to implement topological qubits in an InSb nanowire
Sebastian Heedt, Marina Quintero-Pérez, Francesco Borsoi, Alexandra Fursina, Nick van Loo, Grzegorz P. Mazur, Michał P. Nowak, Mark Ammerlaan, Kongyi Li, Svetlana Korneychuk, Jie Shen, May An Y. van de Poll, Ghada Badawy, Sasa Gazibegovic, Nick de Jong, Pavel Aseev, Kevin van Hoogdalem, Erik P. A. M. Bakkers, Leo P. Kouwenhoven   +18 more
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Meta-device for sensing subwavelength lateral displacement [PDF]

Light: Science & Applications
Accurate transverse displacement measurement is essential for precise mask-to-wafer positioning in lithography. While lateral displacement metrology has achieved nanometer-level precision, the limitations imposed by coherent state and grating challenge ...
Shufan Chen, Yubin Fan, Hao Li, Xiaodong Qiu, Ben Wang, Lijian Zhang, Shumin Xiao, Din Ping Tsai   +7 more
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Two-photon states meet polarization-gradient metasurfaces for nanometric, low-dose lateral-displacement metrology [PDF]

Light: Science & Applications
Accurate displacement sensing is indispensable in advanced semiconductor lithography. Conventional coherent-light-based approaches are hindered by photon budget limitations, slowing down in-situ measurements. In a recent study, Chen et al.
Qian-Mei Deng, Jun-Hao Zeng, Feng-Jun Li, Zi-Lan Deng   +3 more
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Inverse Lithography Technology (ILT) Under Chip Manufacture Context [PDF]

Micromachines
As semiconductor process nodes shrink to 3 nm and beyond, traditional optical proximity correction (OPC) and resolution enhancement technologies (RETs) can no longer meet the high patterning precision needs of advanced chip manufacturing due to the sub ...
Xiaodong Meng, Cai Chen, Jie Ni
doaj   +2 more sources

AI-Assisted Composite Etch Model for MPT [PDF]

Micromachines
For advanced semiconductor nodes, the demand for high-precision patterning of complex foundry circuits drives the widespread use of Lithography-Etch-Lithography-Etch (LELE)—a key Multiple Patterning Technology (MPT)—in Deep Ultraviolet (DUV) processes ...
Yanbin Gong, Fengsheng Zhao, Devin Sima, Wenzhang Li, Yingxiong Guo, Cheming Hu, Shengrui Zhang   +6 more
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Direct resist-free patterning of an organic semiconductor via thermal scanning probe lithography [PDF]

Discover Nano
Organic semiconductors are widely regarded as a key material platform for next generation flexible and wearable electronics. Realizing high-resolution, well-defined patterns is essential to scale organic field effect transistors for higher device density
Kaimin Luo, Jun Li, Yanshu Gu, Tianlei Ma, Jingyuan Zhang, Liying Cao, Zhaohui Zhu, Heng Tang, Pengcheng Xu, Hao Jia, Min Tu, Xinxin Li   +11 more
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Advancements and challenges in inverse lithography technology: a review of artificial intelligence-based approaches [PDF]

Light: Science & Applications
Inverse lithography technology (ILT) is a promising approach in computational lithography to address the challenges posed by shrinking semiconductor device dimensions.
Yixin Yang, Kexuan Liu, Yunhui Gao, Chen Wang, Liangcai Cao   +4 more
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Strained 2D Semiconductor Lateral Heterojunctions via Grayscale Thermal‐Scanning Probe Lithography [PDF]

Small Science
Nanoscale tailoring of the optoelectronic response of 2D transition metal dichalcogenides semiconductor layers (TMD) is demonstrated thanks to a novel strain engineering approach based on grayscale thermal‐Scanning Probe Lithography (t‐SPL).
Giorgio Zambito, Giulio Ferrando, Matteo Barelli, Michele Ceccardi, Federico Caglieris, Daniele Marrè, Francesco Bisio, Francesco Buatier de Mongeot, Maria Caterina Giordano   +8 more
doaj   +2 more sources

Cryo-electron tomography reconstructs polymer in liquid film for fab-compatible lithography [PDF]

Nature Communications
Liquid film is ubiquitous in nature and serves as the critical medium for the dissolution of photoresist to create nanoscale circuit patterns in lithography, which is a core task since the birth of semiconductor industry.
Liming Zheng, Yijie Xia, Xia Jia, Mingyi Gao, Nan Liu, Jiling Song, XiaoPeng Li, Xiaole Zhao, Xin Gao, Wen Zhou, Wenbing Kang, Lijiang Yang, Qianqian Wang, Yiqin Gao, Hong-Wei Wang, Hailin Peng   +15 more
doaj   +2 more sources