Results 11 to 20 of about 3,859 (261)
IEEE Photonics Journal, 2017 A silicon-on-insulator (SOI) device is an important integrated circuit technology containing an insulating material. In this paper, an SOI wafer consisting of n-type silicon grown on the surface of a SiO2 layer was adopted.
Xiaoyi Lv +6 more
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Fabrication and characterization of silicon-on-insulator wafers
Micro and Nano Systems Letters, 2023 Silicon-on-insulator (SOI) wafers offer significant advantages for both Integrated circuits (ICs) and microelectromechanical systems (MEMS) devices with their buried oxide layer improving electrical isolation and etch stop function.
Taeyeong Kim, Jungchul Lee
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Design Technology Co-Optimization Strategy for Ge Fraction in SiGe Channel of SGOI FinFET
Nanomaterials, 2023 FinFET devices and Silicon-On-Insulator (SOI) devices are two mainstream technical routes after the planar MOSFET reached the limit for scaling. The SOI FinFET devices combine the benefits of FinFET and SOI devices, which can be further boosted by SiGe ...
Shixin Li, Zhenhua Wu
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Modern Electronic Materials, 2015 SOI (silicon-on-insulator) structures with strained and unstrained silicon layers were studied by ultrasoft X-ray emission spectroscopy and X-ray absorption near edge structure spectroscopy with the use of synchrotron radiation techniques.
Vladimir A. Terekhov +5 more
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Strong Electro-Absorption in GeSi Epitaxy on Silicon-on-Insulator (SOI) [PDF]
Micromachines, 2012 We have investigated the selective epitaxial growth of GeSi bulk material on silicon-on-insulator substrates by reduced pressure chemical vapor deposition. We employed AFM, SIMS, and Hall measurements, to characterize the GeSi heteroepitaxy quality. Optimal growth conditions have been identified to achieve low defect density, low RMS roughness with ...
Luo, Ying +15 more
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Two Dimensional Analytical Modeling for SOI and SON MOSFET and Their Performance Comparison [PDF]
Журнал нано- та електронної фізики, 2011 During last few decade continuous device performance improvements have been achieved through a combination of device scaling, new device structures and material property improvement to its fundamental limits.
Saptarsi Ghosh +3 more
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Optimization of Hybrid Silicon Microring Lasers
IEEE Photonics Journal, 2011 In this paper, we review the recent optimization work in hybrid silicon microring lasers. Device structure and fabrication procedures are discussed first, followed by two major improvements in carrier injection and thermal management.
D. Liang +6 more
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Analysis of Voltage Transfer Characteristics of Nano-scale SOI CMOS Inverter with Variable Channel Length and Doping Concentration [PDF]
Журнал нано- та електронної фізики, 2015 During many decades, continuous device performance improvement has been made possible only through device scaling. But presently, due to aggressive scaling at the sub-micron or nanometer region, the conventional planner silicon technology is suffering ...
A. Daniyel Raj +2 more
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Scheme Topological Modeling of Converters Signal Levels for Analytical Microsystems-on-Chip
Фізика і хімія твердого тіла, 2016 The results of scheme-topology design and computer modeling for signal level converter of integrated circuits and micro analysis on the basic matrix chip (BMK) with the structures "silicon-on-insulator" (SOI) are present in ...
V. V. Dovgiy, I T. Kohut, V. I. Holota
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IEEE Photonics Journal, 2013 We demonstrate an integrated spectrometer-on-a-chip composed of an echelle diffraction grating (EDG) and metal-semiconductor-metal (MSM) waveguide photodetector array based on silicon-on-insulator (SOI).
Xiao Ma, Mingyu Li, Jian-Jun He
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