Results 31 to 40 of about 1,194,614 (343)
Error Propagation Mitigation in Sliding Window Decoding of Braided Convolutional Codes
We investigate error propagation in sliding window decoding of braided convolutional codes (BCCs). Previous studies of BCCs have focused on iterative decoding thresholds, minimum distance properties, and their bit error rate (BER) performance at small to
Bai, Baoming, +5 more
core +1 more source
Replacing the Soft FEC Limit Paradigm in the Design of Optical Communication Systems [PDF]
The FEC limit paradigm is the prevalent practice for designing optical communication systems to attain a certain bit-error rate (BER) without forward error correction (FEC).
Agrell, Erik +4 more
core +6 more sources
On a Hybrid Preamble/Soft-Output Demapper Approach for Time Synchronization for IEEE 802.15.6 Narrowband WBAN [PDF]
In this paper, we present a maximum likelihood (ML) based time synchronization algorithm for Wireless Body Area Networks (WBAN). The proposed technique takes advantage of soft information retrieved from the soft demapper for the time delay estimation ...
Atallah, Leila Najjar +4 more
core +3 more sources
CRC-Aided Fixed Complexity Error Pattern Estimation Technique
Various techniques using cyclic redundancy check (CRC) codes for error correction have been proposed. In previous techniques, a small number of unreliable bits in a packet were toggled in order to change negative acknowledgement (NAK) into ...
Juhee Yun, Nulibyul Kim, Jaekwon Kim
doaj +1 more source
A Methodology to Assess Output Vulnerability Factors for Detecting Silent Data Corruption
As process technology scales, electronic devices become more susceptible to soft error induced by radiation. Silent data corruption (SDC) is considered the most severe outcome incurred by soft error.
Junchi Ma, Zongtao Duan, Lei Tang
doaj +1 more source
Optimized Multiple-Bit-Flip Soft-Errors-Tolerant TCAM using Machine Learning
Soft errors from radiations can change the data in electronic devices especially memory cells such as in TCAMs. The soft errors cause bit-flip errors that makes the data are corrupted in the network.
Infall Syafalni, Trio Adiono
doaj +1 more source
A Cell Sizing Technique for Mitigating Logic Soft Errors in Gate-level Designs
The effect of logic soft errors on the degradation of the reliability becomes more crucial in the case of nano-meter semiconductor designs. Several hardening techniques have been reported from the transistor- to system-level.
KIM, J. T., PARK, J. K.
doaj +1 more source
Multi-level Turbo Decoding Assisted Soft Combining Aided Hybrid ARQ [PDF]
Hybrid Automatic Repeat reQuest (ARQ) plays an essential role in error control. Combining the incorrectly received packet replicas in hybrid ARQ has been shown to reduce the resultant error probability, while improving the achievable throughput.
Chen, Hong +2 more
core +1 more source
With the rapid development of semiconductor technology, the reduction in device operating voltage and threshold voltage has made integrated circuits more susceptible to the effects of particle radiation. Moreover, as process sizes decrease, the impact of
Rui Dong +6 more
doaj +1 more source
This paper presents two novel quadruple cross-coupled memory cell designs, namely QCCM10T and QCCM12T, with protection against single event upsets (SEUs) and double-node upsets (DNUs).
Aibin Yan +6 more
doaj +1 more source

