Results 31 to 40 of about 1,939,285 (262)
Comprehensive Design of Device Parameters for GaN Vertical Trench MOSFETs
In this work, device parameters for GaN vertical trench MOSFETs have been investigated systematically to further improve the device characteristics. The n- GaN drift layer, the p+ GaN layer and the trench gate are designed and optimized systematically ...
Shuang Liu +10 more
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Integratable trench MOSFET with ultra‐low specific on‐resistance
A novel integratable metal–oxide–semiconductor field‐effect transistor (MOSFET) with a trench source (TS) and a trench gate (TG) (TS–TG MOSFET) is proposed. The TS and TG cause a strong assistant depletion effect and thus dramatically increase the N ‐drift doping concentration (
Chao Yin +3 more
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Numerical Analysis of the LDMOS With Side Triangular Field Plate
A Lateral Double-diffused Metal Oxide Semiconductor (LDMOS) with side triangular field plate (STFP) is proposed for improving the breakdown voltage (BV) and reducing the specific on-resistance (Ron,sp). The main feature of the novel LDMOS is the STFPs at
Jiafei Yao +5 more
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Simulative Researching of a 1200V SiC Trench MOSFET With an Enhanced Vertical RESURF Effect
A SiC trench MOSFET with an enhanced vertical RESURF effect is proposed and analyzed in this article. The device features a deep oxide trench surrounded by a P-type doping layer at the source-side. With the assistant depletion effect of the P-type layer,
Han Yang +4 more
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The objective of this systematic review and meta-analysis was to examine the effects of climbing and climbing-and-resistance-training on climbing performance, and strength and endurance tests.
Nicolay Stien +4 more
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A method to calculate the voltage-current characteristics of [PDF]
The voltage-current characteristics of the Schottky barrier diode defined by the diode equation can be obtained by using iteration method and a C++ program.
Rajneesh Talwar
doaj
Double silicon drift layers are used to reduce the specific on-resistance (Ron,sp) for a trench-gate-integrated lateral double-diffused MOSFET (DDL TG LDMOS) based on SOI technology in this paper.
Yuan Wang +7 more
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Impacts of operating conditions on specific cake resistance in dead-end microfiltration process
In the present work, the fouling behavior and the corresponding specific cake resistance of polyethersulfone microfiltration membrane fouled by using different solutions (bovine serum albumin solution, sodium alginate solution, humic acid and activated ...
Natsagdorj Khaliunaa +3 more
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ABSTRACT A second allogeneic (allo‐)hematopoietic stem cell transplantation (HSCT2) is a potential curative option for pediatric patients with acute lymphoblastic leukemia (ALL) following relapse after first allogeneic transplantation (HSCT1), but its efficacy is limited by high relapse rates and transplant‐related toxicity in highly pretreated ...
Ava Momm +10 more
wiley +1 more source
Design of Enhancement Mode
In this article, enhancement-mode (E-mode) operation is achieved by employing a trench gate on the $\beta $ -Ga2O3 current aperture vertical MOSFETs via Sentaurus TCAD simulation.
Xiaoqing Chen, Feng Li, Herbert Hess
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