Results 151 to 160 of about 55,876 (211)
Progress of emerging non-volatile memory technologies in industry. [PDF]
MRS CommunHellenbrand M +2 more
europepmc +1 more source
Some of the next articles are maybe not open access.
Related searches:
Related searches:
NV-SRAM: a nonvolatile SRAM with backup ferroelectric capacitors
IEEE Journal of Solid-State Circuits, 2001This paper demonstrates new circuit technologies that enable a 0.25-/spl mu/m ASIC SRAM macro to be nonvolatile with only a 17% cell-area overhead. New capacitor-on-metal/via-stacked-plug process technologies permit a nonvolatile SRAM (NV-SRAM) cell to consist of a six-transistor ASIC SRAM cell and two backup ferroelectric capacitors stacked over the ...
H Hada, T Kunio
exaly +2 more sources
Carbon Nanotube-Based CMOS SRAM: 1 kbit 6T SRAM Arrays and 10T SRAM Cells
IEEE Transactions on Electron Devices, 2019We experimentally demonstrate the first static random-access memory (SRAM) arrays based on carbon nanotube (CNT) field-effect transistors (CNFETs). We demonstrate 1 kbit (1024) 6 transistor (6T) SRAM arrays fabricated with complementary metal-oxide-semiconductor (CMOS) CNFETs (totaling 6144 p- and n-type CNFETs), with all 1024 cells functioning ...
Pritpal S Kanhaiya +2 more
exaly +2 more sources
SRAM Gauge: SRAM Health Monitoring via Cells Race
2021 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), 2021By shrinking transistors' dimensions and, consequently, reducing the operating voltage in nano-scale CMOS technologies, the stability of SRAM cells has become a major reliability concern. SRAM cells' robustness against undesirable bit-flips is commonly measured by Static Noise Margin (SNM). Degradation in SNM is mainly because of the gradual variations
Nezam Rohbani, Masoumeh Ebrahimi
openaire +1 more source
2011 5th International Conference on Network and System Security, 2011
Key storage is a well-known security issue. Usually, keys are generated and then stored in an non-volatile memory (NVM). A promising alternative are the so-called physical unclonable functions (PUFs). These functions extract key material directly from manufacturing variabilities of a device. One example of such a PUF is the SRAM-PUF.
Christoph Böhm 0003 +2 more
openaire +1 more source
Key storage is a well-known security issue. Usually, keys are generated and then stored in an non-volatile memory (NVM). A promising alternative are the so-called physical unclonable functions (PUFs). These functions extract key material directly from manufacturing variabilities of a device. One example of such a PUF is the SRAM-PUF.
Christoph Böhm 0003 +2 more
openaire +1 more source
2011 International Symposium on Electronic System Design, 2011
In this paper an effort is made to design an energy efficient 5T SRAM in 65nm technology. The energy recovery driver saves energy in the single bit line in addition to enhancing the write ability of the 5T SRAM. The energy recovery is possible by pumping the bit line energy back into the bit line voltage source instead of allowing to ground after write
Mamatha Samson, Satyam Mandavalli
openaire +1 more source
In this paper an effort is made to design an energy efficient 5T SRAM in 65nm technology. The energy recovery driver saves energy in the single bit line in addition to enhancing the write ability of the 5T SRAM. The energy recovery is possible by pumping the bit line energy back into the bit line voltage source instead of allowing to ground after write
Mamatha Samson, Satyam Mandavalli
openaire +1 more source
2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2016
Current delivery is a major challenge in chip design. Reduction of the nominal voltage due to technology scaling has worsened the problem. Voltage stacking has been proposed as a way to alleviate the problem by delivering power in a serial rather than the conventional parallel way. Several studies have proposed techniques to stack logic designs.
Elnaz Ebrahimi 0001 +2 more
openaire +1 more source
Current delivery is a major challenge in chip design. Reduction of the nominal voltage due to technology scaling has worsened the problem. Voltage stacking has been proposed as a way to alleviate the problem by delivering power in a serial rather than the conventional parallel way. Several studies have proposed techniques to stack logic designs.
Elnaz Ebrahimi 0001 +2 more
openaire +1 more source
2010 23rd International Conference on VLSI Design, 2010
This paper describes the SRAM design concept in FinFETtechnologies using unique features of non-planar double-gated devices. The parameter space required to design FinFETs is explored.Variety of SRAM design techniques are presented exploiting the advantages of tied gate and independent gate controlled configurations.
Rajiv V. Joshi +2 more
openaire +1 more source
This paper describes the SRAM design concept in FinFETtechnologies using unique features of non-planar double-gated devices. The parameter space required to design FinFETs is explored.Variety of SRAM design techniques are presented exploiting the advantages of tied gate and independent gate controlled configurations.
Rajiv V. Joshi +2 more
openaire +1 more source
Proceedings of the IEEE, 1999
This paper describes a new high-density low-power circuit approach for implementing static random access memory (SRAM) using low current density resonant tunneling diodes (RTDs). After an overview of semiconductor random access memory architecture and technology, the concept of tunneling-based SRAM (TSRAM) is introduced.
openaire +1 more source
This paper describes a new high-density low-power circuit approach for implementing static random access memory (SRAM) using low current density resonant tunneling diodes (RTDs). After an overview of semiconductor random access memory architecture and technology, the concept of tunneling-based SRAM (TSRAM) is introduced.
openaire +1 more source
2016 8th International Symposium on Telecommunications (IST), 2016
Exploring possible vulnerabilities for making hardware Trojans helps designers to improve the security and trust of integrated circuits (ICs). This paper discusses the hardware Trojan possibility in SRAM to evaluate the security of SRAM and evaluates the effectiveness of existing detection methods.
Roghayeh Saeidi +1 more
openaire +1 more source
Exploring possible vulnerabilities for making hardware Trojans helps designers to improve the security and trust of integrated circuits (ICs). This paper discusses the hardware Trojan possibility in SRAM to evaluate the security of SRAM and evaluates the effectiveness of existing detection methods.
Roghayeh Saeidi +1 more
openaire +1 more source