Results 61 to 70 of about 2,552 (174)

An Ecosystem to Develop Multi‐Agent Systems in Real‐World IoT Applications

Software: Practice and Experience, Volume 56, Issue 4, Page 339-356, April 2026.
ABSTRACT Software agents and multi‐agent systems are critical components in the development of distributed autonomous systems, as they exhibit a wide range of “intelligence,” from reactive behaviors to advanced reasoning and planning. Integrating these capabilities into multi‐agent systems enables distributed artificial intelligence, a programming ...
Davide Carnemolla, Fabrizio Messina, Federico Fausto Santoro, Corrado Santoro   +3 more
wiley   +1 more source

Analysis of Magnetic Switching in Magnetically Coupled Dual Free Layers Within Magnetic Tunnel Junctions (MTJ) for STT MRAM

Advanced Electronic Materials, Volume 12, Issue 5, 9 March 2026.
A magnetic tunnel junction (MTJ) with two free layers shows four magnetization reversal phases governed by interlayer magnetic coupling (Jcpl). Phase 2 (sequential reversal) reduces write current (Iw) by 50% for 30‐nm‐diameter MTJs compared to Phase 4 (coherent reversal), while Jcpl also boosts thermal stability.
Shujun Ye, Koichi Nishioka
wiley   +1 more source

Ternary Content‐Addressable Memory Using One Capacitor and One Nanoelectromechanical Memory Switch for Data‐Intensive Applications

Advanced Intelligent Systems, Volume 8, Issue 3, March 2026.
A charge‐domain ternary content‐addressable memory using one capacitor one nanoelectromechanical memory switch (1C‐1N TCAM) is proposed for energy‐efficient, high‐reliability computations. Integrated with the back‐end‐of‐line process, the 1C‐1N TCAM leverages the air gap capacitance to achieve a high capacitance ratio and ternary functionality.
Jin Wook Lee, Changha Kim, Geun Tae Park, Seung Hun Baek, Myeong Su Shin, Woo Young Choi   +5 more
wiley   +1 more source

SRAM-PG: Power Delivery Network Benchmarks from SRAM Circuits

2024 25th International Symposium on Quality Electronic Design (ISQED)
Designing the power delivery network (PDN) in very large-scale integrated (VLSI) circuits is increasingly important, especially for nowadays low-power integrated circuit (IC) design. In order to ensure that the designed PDN enables a low level of voltage drop and noise which is required for the success of IC design, accurate analysis of PDN is largely ...
Shen, Shan, Liu, Zhiqiang, Yu, Wenjian
openaire   +2 more sources

Review of Memristors for In‐Memory Computing and Spiking Neural Networks

Advanced Intelligent Systems, Volume 8, Issue 3, March 2026.
Memristors uniquely enable energy‐efficient, brain‐inspired computing by acting as both memory and synaptic elements. This review highlights their physical mechanisms, integration in crossbar arrays, and role in spiking neural networks. Key challenges, including variability, relaxation, and stochastic switching, are discussed, alongside emerging ...
Mostafa Shooshtari, Teresa Serrano‐Gotarredona, Bernabé Linares‐Barranco   +2 more
wiley   +1 more source

Hybrid Convolutional Neural Network‐Analytical Model for Prediction of Line Edge Roughness‐Induced Performance Variations in Fin‐Shaped Field‐Effect Transistor Devices and SRAM

Advanced Intelligent Systems, Volume 8, Issue 3, March 2026.
This work presents a hybrid model for predicting the electrical characteristics of fin‐shaped field‐effect transistor devices and SRAM with line edge roughness. The model consists of a convolutional neural network (CNN) and an analytical model that simulates the electrical characteristics of transistors using the outputs of CNN, enabling fast and ...
Jaehyuk Lim, Myongjin Kim, Changwoo Han, Hyoung Won Baac, Changhwan Shin   +4 more
wiley   +1 more source

Efficient Scheduling Algorithms for Multicore Cyclic Executives With Precedence and Exclusion Relations

Concurrency and Computation: Practice and Experience, Volume 38, Issue 5, March 2026.
ABSTRACT Cyclic executives (CEs) offer the advantage of ensuring complete determinism with minimal runtime overhead, often making them the preferred choice for safety‐critical real‐time systems. However, generating CEs for multicore processors while addressing task precedence and exclusion relations presents significant challenges.
Bruno Nogueira, Alfredo Lima, Eduardo Tavares, Rodrigo Paes, Francisco Airton Silva   +4 more
wiley   +1 more source

System Integration and Field Testing of Low‐Cost Autonomous Platooning Platforms: Collision Avoidance Scenario

Journal of Field Robotics, Volume 43, Issue 2, Page 847-878, March 2026.
ABSTRACT This paper presents the development and validation of a scalable platooning system based on the predecessor‐following (PF) topology, designed for low‐cost follower platforms. It integrates key technologies such as localization, path planning, profile generation, and low‐level control to create a practical solution.
Dongwoo Seo, Jinhee Lee, Jaeyoung Kang
wiley   +1 more source

Carbon Nanotube Based Variation Tolerant Low Power Cache Memory for 5G Networks [PDF]

Iranian Journal of Electrical and Electronic Engineering
The overall performance of any integrated circuit is defined by its proper memory design, as it is a mandatory and major block which requires more area and power.
Kavitha Manickam, P.K. Janani, S. Karthick, S. Arulsivam, C. Vikram, G. Hariharan, R. Kavinkumar, P. Ganesh   +7 more
doaj  

A blueprint for fortification planning and programming: Lessons learned from an analytical review of existing fortification frameworks

Maternal &Child Nutrition, Volume 22, Issue 1, March 2026.
The proposed Fortification Blueprint provides a call to action (and a mechanism to operationalize the call) around the need to take a renewed look at fortification programmes to address historically persistent challenges. Abstract With multiple food fortification frameworks, countries can find it challenging to determine optimal methods for planning ...
Roopa Darwar, Laura A. Rowe, Manpreet Chadha, Ana M. Sanson‐Rosas, Mandana Arabi   +4 more
wiley   +1 more source