Results 41 to 50 of about 13,883 (233)
Impatto dei disturbi sull'alimentazione sul tasso di soft error di memorie SRAM [PDF]
In questo lavoro di tesi è stato studiato l’impatto di un disturbo sull’alimentazione di una cella SRAM sul tasso di errori dovuti a particelle ionizzanti (SER ...
Cavaliere, Marco
core
Sram v doživljanju pacienta in terapevta – psihoterapevtska obravnava sramu
Bulimija je tako kot druge motnje hranjenja, predvsem motnja v doživljanju sramu. Predstavljene tri pacientke sebe značilno doživljajo kot brezvredne, ogabne človeške kreature, ki so nemočno ujete v odvisnost od hrane.
Meta Kramar
doaj +1 more source
Photonic‐Enabled Energy‐Efficient Transparent Neuromorphic Computing Devices: A Review
Transparent photonic neuromorphic computing devices merge optics and brain‐inspired computing to overcome von Neumann bottlenecks with ultrafast, low‐energy processing. By exploiting transparent oxides, 2D materials, phase‐change materials, and hybrid heterostructures, these platforms enable photonic synapses, memory, and logic for see‐through edge ...
Shuvaraj Ghosh +8 more
wiley +1 more source
High-performance dynamic feedback controlbased 8T SRAM using CNTFET technology [PDF]
Exploration of new materials and device technologies for integrated circuits has become essential due to the exponential growth in demand for highperformance, energy-efficient, and scalable computers. In light of their exceptional electrical and
Kumar Abhishek, Sharma Vipin Kumar
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Triple‐Level Content‐Addressable Vertical NAND Flash Memory
Commercial triple‐level‐cell V‐NAND flash memory is transformed into a compact content‐addressable memory by directly exploiting its eight threshold‐voltage states. A parity‐split search scheme preserves storage density while enabling reliable multi‐level and don't‐care matching. Parallel word‐line search delivers up to 24‐fold higher throughput and 54.
Sung‐Ho Park +8 more
wiley +1 more source
A RRAM Integrated 4T SRAM with Self-Inhibit Resistive Switching Load by Pure CMOS Logic Process
This paper reports a novel full logic compatible 4T2R non-volatile static random access memory (nv-SRAM) featuring its self-inhibit data storing mechanism for in low-power/high-speed SRAM application.
Meng-Yin Hsu +4 more
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Wafer‐Scale 3D Integration for High‐Density Multi‐Valued Neuromorphic Logic
Wafer‐scale 3D vertically integrated multi‐valued logic (MVL) circuits are realized by monolithically integrating a Te/IGZO heterojunction FET with an engineered Te pull‐up FET. Heterointerface‐mediated transport and optimized current matching enable stable ternary operation, while vertical stacking reduces circuit footprint and interconnect complexity,
Chang‐Hyeon Kim +5 more
wiley +1 more source
The demand for enhancing the performance of reliable processors necessitates using dependable, energy-efficient, and high-speed memory. Multiple obstacles arise as a consequence of this enhancement at lower technological nodes.
M. Srinu +2 more
doaj +1 more source
Ising machines are emerging as specialized hardware solvers for computationally hard optimization problems. This review examines five major platforms—digital CMOS, analog CMOS, emerging devices, coherent optics, and quantum systems—highlighting physics‐rooted advantages and shared bottlenecks in scalability and connectivity.
Hyunjun Lee, Joon Pyo Kim, Sanghyeon Kim
wiley +1 more source
Emerging Memory and Device Technologies for Hardware‐Accelerated Model Training and Inference
This review investigates the suitability of various emerging memory technologies as compute‐in‐memory hardware for artificial intelligence (AI) applications. Distinct requirements for training‐ and inference‐centric computing are discussed, spanning device physics, materials, and system integration.
Yoonho Cho +6 more
wiley +1 more source

