Results 61 to 70 of about 13,883 (233)
A Memristor‐Based In‐Memory Computing System‐on‐Chip with Efficient Depthwise Convolution
Advanced Intelligent Systems, EarlyView.We present a memristor‐based in‐memory computing (IMC) architecture that enables efficient depthwise convolution (DWC) acceleration. Fabricated in a system‐on‐chip with crossbar arrays, the design improves memory utilization. Experimental validation demonstrates the first hardware acceleration of DWC in IMC, achieving a digital comparable inference ...
Wenhao Song +21 more
wiley +1 more source
A 100MHz to 1GHz, 0.35V to 1.5V Supply 256 x 64 SRAM Block Using Symmetrized 9T SRAM Cell with Controlled Read [PDF]
, 2008 In this paper, we present dynamic voltage and frequency Managed 256 x 64 SRAM block in 65 nm technology, for frequency ranging from 100 MHz to 1 GHz.
Verkila, Satish Anand +2 more
core
Advanced Intelligent Systems, EarlyView.This study introduces a subthreshold in‐memory anomaly detection architecture for wearable ECG monitoring using floating‐gate IGZO content‐addressable memories on a flexible substrate. Area‐engineered coupling provides a high subthreshold slope, while subthreshold operation realizes intrinsic exponential distance evaluation and linear voltage sensing ...
Hyung‐Jun Noh +4 more
wiley +1 more source
NCFET-Based 6-T SRAM: Yield Estimation Based on Variation-Aware Sensitivity
IEEE Journal of the Electron Devices Society, 2020 The key feature of NCFET (negative capacitance field effect transistor) is its sub-threshold slope (SS) <; 60 mV/decade at 300 K. In this work, the n-type NCFET (i.e., pull-down (PD) and passgate (PG) transistor in six-transistor (6T) SRAM bit-cell ...
Yuri Hong, Yejoo Choi, Changhwan Shin
doaj +1 more source
A Scalable and Resource‐Efficient Pipelined p‐Computer for Probabilistic Ising Machines
Advanced Intelligent Systems, EarlyView.(a) Block diagram of the portfolio optimization problem: given M assets, the goal is to determine the optimal weights w that maximize the expected return (based on the mean historical assets return u), while minimizing the risk, quantified by the assets covariance matrix S.
Deborah Volpe +9 more
wiley +1 more source
Interdisciplinary Materials, EarlyView.Neuromorphic hardware enables the integration of sensing, memory, and computing for intelligent artificial perception. Recent advances in multimodal fusion further highlight its potential for embodied intelligence and next‐generation human–machine interfaces.
Yixin Zhu +3 more
wiley +1 more source
A Novel 4T nMOS-Only SRAM Cell in 32nm Technology Node [PDF]
, 2008 This paper proposes a novel loadless 4T SRAM cell composed of nMOS transistors. The SRAM cell is based on 32nm silicon-on-insulator （SO1） technology node. It consists of two access transistors and two pull-down transistors. The pull-down transistors have
Zhang Wancheng, Wu Nanjian
core
M3D-MDA: New scratchpad memory for enhancing GPU performance and energy efficiency
ETRI JournalApplications in various fields, such as deep learning and scientific computing, naturally exhibit data access patterns along both the row and column dimensions of static random access memory (SRAM).
Cong Thuan Do
doaj +1 more source
Suočavanje s krivnjom i sramom
Diacovensia, 2017 Prepoznavati osjećaje koji otežavaju uspostavljanje odnosa s drugima važno je za psihičko i duhovno blagostanje osobe jer kada se upoznamo s njima i postajemo svjesni kako utječu na život, moguće ih je mijenjati radi punijega odnosa s drugima.
Josip Bošnjaković
doaj +1 more source
Journal of Field Robotics, EarlyView.ABSTRACT Marine operations traditionally rely on human intervention, a costly and disruptive method. Autonomous surface vehicles (ASVs) offer a powerful alternative, capable of operating autonomously, for extended periods, and with various sensors for various missions.
Ayman El Qemmah +4 more
wiley +1 more source