Results 51 to 60 of about 17,373 (224)

Leakage Read Fault in Nanoscale SRAM: Analysis, Test and Diagnosis

, 2006
In this paper we study the impact of leakage currents on the operation of SRAM memories fabricated using nanoscale technologies. We show how the leakage currents, flowing through the pass transistors of unselected cells, may affect the read operation ...
Girard, Patrick, Rosinger, Paul, Hashimi, B. M., Dilillo, Luigi   +3 more
core   +1 more source

Re‐Thinking Electronic Circuit Design Through Emerging Reconfigurable Field Effect Transistors

Advanced Science, EarlyView.
Graphical illustration of reconfigurable field effect transistor (RFET) operation modes, including n‐type, p‐type, and ambipolar transport, as well as their areas of application discussed in this review: digital circuit design, analog circuit design, post‐Shannon computing, and sensing. ABSTRACT Reconfigurable field‐effect transistors, short RFETs, are
Jens Trommer, Juan P. Martinez, Yuxuan He, Giulio Galderisi, Katrin Pingen, Eduardo Sergio Oliveros‐Mata, Lisa Tellis, Cigdem Cakirlar, Christoph Beyer, Brojogopal Sapui, Joachim Knoch, Klaus Hofmann, Sandro Carrara, Eugenio Cantatore, Max C. Lemme, Ian O'Connor, Akash Kumar, Andre Heinzig, Thomas Mikolajick, Walter M. Weber   +19 more
wiley   +1 more source

An AI‐Driven Framework for Directed Self‐Assembly Toward Design‐Technology Co‐Optimization

Advanced Science, EarlyView.
An artificial intelligence (AI)‐driven closed‐loop framework integrates experiment, three‐dimensional physics‐based simulation, and template design for directed self‐assembly (DSA). Guided by experimental data, AI‐assisted calibration accelerates model optimization, supports morphology prediction, and identifies template windows.
Caiwei Shang, Yanting Xu, Yue Zhang, Yan Zhang, Jianfeng Li, Ming Li, Longlin Lei, Wenda Bao, Weixuan Zeng, Shisheng Xiong   +9 more
wiley   +1 more source

Emerging Memory and Device Technologies for Hardware‐Accelerated Model Training and Inference

Advanced Electronic Materials, EarlyView.
This review investigates the suitability of various emerging memory technologies as compute‐in‐memory hardware for artificial intelligence (AI) applications. Distinct requirements for training‐ and inference‐centric computing are discussed, spanning device physics, materials, and system integration.
Yoonho Cho, Dae‐won Kim, Yujin Kim, Jung‐Heum Na, Yuwon Jeong, Dong‐Yeop Lee, Shinhyun Choi   +6 more
wiley   +1 more source

Efficient In‐Hardware Matrix–Vector Multiplication and Addition Exploiting Bilinearity of Schottky Barrier Transistors Processed on Industrial FDSOI

Advanced Electronic Materials, EarlyView.
ABSTRACT Machine learning and Artificial Intelligence (AI) tasks have stretched traditional hardware to its limits. In‐hardware computation is a novel approach that aims to run complex operations, such as matrix–vector multiplication, directly at the device level for increased efficiency.
Juan P. Martinez, Niladri Bhattacharjee, Yuxuan He, Giulio Galderisi, Brojogopal Sapui, Sara Mannaa, Ian O'Connor, Violetta Sessi, Peter Javorka, Thomas Mikolajick, Jens Trommer   +10 more
wiley   +1 more source

Stochastic‐MTJ Sampler Arrays for In‐Array Monte–Carlo Estimation

Advanced Electronic Materials, EarlyView.
A low‐energy‐barrier magnetic tunnel junction array is operated as a probability‐domain sampler: each cell's random switching, programmed through a shared digital‐to‐analog converter, makes the per‐column multiply–accumulate an unbiased Monte–Carlo expectation estimator that returns both a mean and a calibrated uncertainty.
Ran Zhang, Nellie Laleni, Sina Ranjbar, Andreas Tsiougkos, Nandakishor Yadav, Vasilis Pavlidis, Thomas Kämpfe   +6 more
wiley   +1 more source

A Scalable and Resource‐Efficient Pipelined p‐Computer for Probabilistic Ising Machines

Advanced Intelligent Systems, EarlyView.
(a) Block diagram of the portfolio optimization problem: given M assets, the goal is to determine the optimal weights w that maximize the expected return (based on the mean historical assets return u), while minimizing the risk, quantified by the assets covariance matrix S.
Deborah Volpe, Eleonora Raimondo, Andrea Grimaldi, Pedram Khalili Amiri, Stefano Chiappini, Anna Giordano, Mario Carpentieri, Hyunsoo Yang, Massimo Chiappini, Giovanni Finocchio   +9 more
wiley   +1 more source

Linear System Identification and Control of a Low‐Cost High‐Performance Omnidirectional Marine Surface Vehicle for Swarming Applications

Journal of Field Robotics, EarlyView.
ABSTRACT Marine operations traditionally rely on human intervention, a costly and disruptive method. Autonomous surface vehicles (ASVs) offer a powerful alternative, capable of operating autonomously, for extended periods, and with various sensors for various missions.
Ayman El Qemmah, Gianni Cario, Alessandro Casavola, Marco Lupia, Francesco Tedesco   +4 more
wiley   +1 more source

Analysis and Test of the Effects of Single Event Upsets Affecting the Configuration Memory of SRAM-based FPGAs [PDF]

, 2013
SRAM-based FPGAs are increasingly relevant in a growing number of safety-critical application fields, ranging from automotive to aerospace. These application fields are characterized by a harsh radiation environment that can cause the occurrence of ...
CASSANO, LUCA MARIA
core  

SRAM precharge system for reducing write power

, 2015
This paper presents the static random access memory (SRAM) precharge system by using an equaliser and a sense circuit. Recent goals of designing SRAM are to reduce area, delay, and power, and to maintain standard data stability and writability.
Kabir, Hussain Mohammed Dipu, Chan, Mansun   +1 more
core   +1 more source