Results 51 to 60 of about 13,883 (233)
Advanced Electronic Materials, EarlyView.ABSTRACT Machine learning and Artificial Intelligence (AI) tasks have stretched traditional hardware to its limits. In‐hardware computation is a novel approach that aims to run complex operations, such as matrix–vector multiplication, directly at the device level for increased efficiency.
Juan P. Martinez +10 more
wiley +1 more source
Analysis and Test of the Effects of Single Event Upsets Affecting the Configuration Memory of SRAM-based FPGAs [PDF]
, 2013 SRAM-based FPGAs are increasingly relevant in a growing number of safety-critical application fields, ranging from automotive to aerospace. These application fields are characterized by a harsh radiation environment that can cause the occurrence of ...
CASSANO, LUCA MARIA
core
Low Power CNFET SRAM Design [PDF]
, 2014 CNFET has emerged as an alternative material to silicon for high performance, high stability and low power SRAM design in recent years. SRAM functions as cache memory in computers and many portable devices.
Pejman Hosseiniun +3 more
core +1 more source
An Embedded Level-Shifting Dual-Rail SRAM for High-Speed and Low-Power Cache
IEEE Access, 2020 An embedded level-shifting (ELS) dual-rail SRAM is proposed to enhance the availability of dual-rail SRAMs. Although dual-rail SRAM is a powerful solution for satisfying the increasing demand for low-power applications, the enormous performance ...
Tae Hyun Kim +5 more
doaj +1 more source
Design and Development of Efficient SRAM Cell Based on FinFET for Low Power Memory Applications
Journal of Electrical and Computer Engineering, 2023 Stationary random-access memory (SRAM) undergoes an expansion stage, to repel advanced process variation and support ultra-low power operation. Memories occupy more than 80% of the surface in today’s microdevices, and this trend is expected to continue ...
M. V. Nageswara Rao +6 more
doaj +1 more source
Advanced Electronic Materials, EarlyView.Passive resistive memory arrays promise efficient in‐memory computing but suffer from sneak paths and programming variability. Here, highly uniform 32 × 32 passive RRAM crossbars are programmed with multilevel precision below 3% error and 99.5% yield.
S. Ricci +6 more
wiley +1 more source
SRAM with single bit line and low standby power consumption [PDF]
, 2011 指導教授：蕭明椿博士[[abstract]]在修平研究所這兩年說短不短說長不長，指導教授蕭明椿老師不只教導我在學術上的研究，平時就對待任何事情，也時常提醒我態度的謹慎，將所做事情完善的處理好。除了蕭老師之外也受到很多老師的關懷，不管在研究所的課程還是未來出社會找工作都一直有提出一些看法與我們探討，所長更是為了我們的研究環境想盡辦法，使我們能夠專心學習。[[abstract]]This thesis presents two kinds of novel single/dual SRAM with ...
廖笙緯
core
Advanced Intelligent Discovery, EarlyView.Capacitive, charge‐domain compute‐in‐memory (CIM) stores weights as capacitance,eliminating DC sneak paths and IR‐drop, yielding near‐zero standbypower. In this perspective, we present a device to systems level performance analysis of most promising architectures and predict apathway for upscaling capacitive CIM for sustainable edge computing ...
Kapil Bhardwaj +2 more
wiley +1 more source
A 100MHz to 1GHz, 0.35V to 1.5V supply 256 x 64 SRAM mock using symmetrized 9T SRAM cell with controlled read [PDF]
, 2008 In this paper, we present Dynamic Voltage and Frequency Managed 256 x 64 SRAM block in 65nm technology, for frequency ranging from 100MHz to 1GHz.
Verkila, Satish Anand +2 more
core
Robust SRAM Designs and Analysis [PDF]
, 2013 This book provides a guide to Static Random Access Memory (SRAM) bitcell design and analysis to meet the nano-regime challenges for CMOS devices and emerging devices, such as Tunnel FETs.
Mohanty, Saraju P +2 more
core +1 more source