Results 11 to 20 of about 10,751 (237)

Multifunctional computing-in-memory SRAM cells based on two-surface-channel MoS2 transistors

open access: yesiScience, 2021
Summary: Driven by technologies such as machine learning, artificial intelligence, and internet of things, the energy efficiency and throughput limitations of the von Neumann architecture are becoming more and more serious.
Fan Wang   +7 more
doaj   +1 more source

SRAM Cell Design Challenges in Modern Deep Sub-Micron Technologies: An Overview

open access: yesMicromachines, 2022
Microprocessors use static random-access memory (SRAM) cells in the cache memory design. As a part of the central computing component, their performance is critical.
Waqas Gul   +2 more
doaj   +1 more source

Investigating SRAM PUFs in large CPUs and GPUs [PDF]

open access: yes, 2015
Physically unclonable functions (PUFs) provide data that can be used for cryptographic purposes: on the one hand randomness for the initialization of random-number generators; on the other hand individual fingerprints for unique identification of ...
Bernstein, Daniel J.   +2 more
core   +10 more sources

A Low Threshold Voltage Ultradynamic Voltage Scaling SRAM Write Assist Technique for High-Speed Applications

open access: yesActive and Passive Electronic Components, 2023
With the percentage of embedded SRAM increasing in SoC chips, low-power design such as the near-threshold SRAM technique are getting increasing attention to reduce the entire chip energy consumption. However, the descending operating voltage will lead to
Uma Maheshwar Janniekode   +1 more
doaj   +1 more source

Novel Low Power Cross-Coupled FET-Based Sense Amplifier Design for High-Speed SRAM Circuits

open access: yesMicromachines, 2023
We live in a technologically advanced society where we all use semiconductor chips in the majority of our gadgets, and the basic criterion concerning data storage and memory is a small footprint and low power consumption. SRAM is a very important part of
G. Lakshmi Priya   +5 more
doaj   +1 more source

A Reconfigurable SRAM Based CMOS PUF With Challenge to Response Pairs

open access: yesIEEE Access, 2021
This paper presents a reconfigurable SRAM-based physically unclonable function (PUF) topology with multiple challenge-response pairs (CRPs) per cell. The proposed PUF structure enables a very large CRP space by connecting additional pull-up and pull-down
Seungbum Baek   +5 more
doaj   +1 more source

Improved Performance of SRAM-Based True Random Number Generator by Leveraging Irradiation Exposure

open access: yesSensors, 2020
Encryption is an important step for secure data transmission, and a true random number generator (TRNG) is a key building block in many encryption algorithms. Static random-access memory (SRAM) chips can be easily available sources of true random numbers,
Xu Zhang   +9 more
doaj   +1 more source

In‐memory multibit multiplication and accumulation based on an automatic pulse generation circuit

open access: yesElectronics Letters, 2023
Computing‐in‐memory (CIM) is a promising technique for solving the ‘memory wall’ and ‘power consumption wall’ problems. However, calculations in the analog domain are limited in terms of accuracy and sensitivity to process, voltage, and temperature ...
Su Bai   +5 more
doaj   +1 more source

SRAM-PUF Key Extraction Method and Performance Analysis Based on RS and BCH Codes [PDF]

open access: yesJisuanji gongcheng
The Physical Unclonable Function (PUF) is a unique and nonreplicable physical fingerprint formed by random deviations during chip manufacturing that can be used to identify individual chips.
Yu ZHOU, Zongguang YU
doaj   +1 more source

Command vector memory systems: high performance at low cost [PDF]

open access: yes, 1998
The focus of this paper is on designing both a low cost and high performance, high bandwidth vector memory system that takes advantage of modern commodity SDRAM memory chips.
Corbal San Adrián, Jesús   +2 more
core   +1 more source

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