Results 21 to 30 of about 546 (170)
Wafer Burn-in Method of SRAM for Multi Chip Package [PDF]
This paper presents the improved bum-in method for the reliability of SRAM in Multi Chip Package (MCP). Semiconductor reliability is commonly improved through the bum-in process. Reliability problem is more significant in MCP that includes over two chips in a package, because the failure of one chip (SRAM) has a large influence on the yield and quality
Hoo-Sung Kim +2 more
openaire +1 more source
ABSTRACT The accelerating expansion of data‐centric technologies is sharply increasing the energy burden of information storage, placing unprecedented pressure on the efficiency of magnetic switching. Conventional field‐driven reversal, once the foundation of magnetic memory, has become impractical in modern architectures due to its high energy cost ...
Mohammad H. Badarneh +2 more
wiley +1 more source
The perspective presents an integrated view of neuromorphic technologies, from device physics to real‐time applicability, while highlighting the necessity of full‐stack co‐optimization. By outlining practical hardware‐level strategies to exploit device behavior and mitigate non‐idealities, it shows pathways for building efficient, scalable, and ...
Kapil Bhardwaj +8 more
wiley +1 more source
Research and Evaluation on SEM-based FPGA Anti-SEU Solution
With the development of aerospace avionics, there is an increasing demand for high performance chips to handle data processing and transmission requirements.
SUN Yifan;BAI Liang;SHUANG Xiaochuan;TIAN Wenbo;YOU Hongjun
doaj
Photonic‐Enabled Energy‐Efficient Transparent Neuromorphic Computing Devices: A Review
Transparent photonic neuromorphic computing devices merge optics and brain‐inspired computing to overcome von Neumann bottlenecks with ultrafast, low‐energy processing. By exploiting transparent oxides, 2D materials, phase‐change materials, and hybrid heterostructures, these platforms enable photonic synapses, memory, and logic for see‐through edge ...
Shuvaraj Ghosh +8 more
wiley +1 more source
Atmospheric neutron inducing single event effects on AI chips manufacturing with 8 nm FinFET
--With the rapid advancement of artificial intelligence (AI) chips in diverse applications, single event effects (SEE) caused by high energy particles in ambient environment have emerged as a critical concern.
Yonghong Li +7 more
doaj +1 more source
Triple‐Level Content‐Addressable Vertical NAND Flash Memory
Commercial triple‐level‐cell V‐NAND flash memory is transformed into a compact content‐addressable memory by directly exploiting its eight threshold‐voltage states. A parity‐split search scheme preserves storage density while enabling reliable multi‐level and don't‐care matching. Parallel word‐line search delivers up to 24‐fold higher throughput and 54.
Sung‐Ho Park +8 more
wiley +1 more source
As the area occupied by static random access memory (SRAM) continues to increase in advanced integrated circuits, SRAM yield has become a critical factor that directly constrains chip cost and manufacturing efficiency.
Hailong Li +3 more
doaj +1 more source
Trusted Cameras on Mobile Devices Based on SRAM Physically Unclonable Functions
Nowadays, there is an increasing number of cameras placed on mobile devices connected to the Internet. Since these cameras acquire and process sensitive and vulnerable data in applications such as surveillance or monitoring, security is essential to ...
Rosario Arjona +3 more
doaj +1 more source
The application of a SRAM chip as a novel neutron detector
High-density, fast digital devices, like field programmable gate arrays (FPGAs), microcontrollers, and static random access memories (SRAMs), can be produced by nanotechnology. New technologies allow the design of fast and powerful devices; however, the decreasing dimensions create new problems.
D. Makowski +5 more
openaire +1 more source

