Results 11 to 20 of about 2,464,424 (247)
Effect of Threshold Roll-Off on Static Noise Margin of Sram Cell
, 2018 Thethreshold roll-off is a vital phenomena to be considered for any low-power and small-scale circuit design. With the advancement of the fabrication processes the channel length of the transistors is reducing rapidly, this reduction in the channel length affects the threshold voltage of the transistors very severely.
Sunil Kumar Ojha +3 more
openaire +2 more sources
Increasing static noise margin of single-bit-line SRAM by lowering bit-line voltage during reading [PDF]
, 2011 A 64-kb SRAM circuit with a single bit line (BL) for reading and with two BLs for writing was designed. Single-BL reading is achieved by using a left access transistor and a left shared reading port.
深山, 正幸 +7 more
core +2 more sources
Expanded Noise Margin 10T SRAM Cell using Finfet Device [PDF]
, 2023 Static random access memory (SRAM) cells are being improved in order to increase resistance to device level changes and satisfy the requirements of low-power applications.
Prashant Udaychand Jain +3 more
core +1 more source
Monolithic 3D Inverter with Interface Charge: Parameter Extraction and Circuit Simulation
Applied Sciences, 2021 We have simulated a monolithic three-dimensional inverter (M3DINV) structure by considering the interfacial trap charges generated thermally during the monolithic three-dimensional integration process.
Tae Jun Ahn, Sung Kyu Lim, Yun Seop Yu
doaj +1 more source
Teaching Digital Noise And Noise Margin Issues In Engineering Education
, 2005 This paper presents digital noise in signal integrity and clarifies noise margin issues in digital electronics education. For the static noise margin, the traditional definition violates the basic principle of noise.
Yang, Li, Yuan, Jiann S.
core +2 more sources
An 8kb RRAM-Based Nonvolatile SRAM with Pre-Decoding and Fast Storage/Restoration Time
Applied Sciences, 2022 Combining the advantages of low-power consumption of static random access memory (SRAM) with high stability and nonvolatile of resistive memory (RRAM), an improved 8T2R nonvolatile SRAM (nvSRAM) memory cell was proposed in this paper.
Jiayu Yin +4 more
doaj +1 more source
The impact of random doping effects on CMOS SRAM cell [PDF]
, 2004 The SRAM has a very constrained cell area and is consequently sensitive to the intrinsic parameter fluctuations ubiquitous in decananometer scale MOSFETs.
Cheng, B. +5 more
core +1 more source
Ultra-Low Power High Stability 8T SRAM for Application in Object Tracking System
IEEE Access, 2018 In this paper, an ultra-low power (ULP) 8T static random access memory (SRAM) is proposed. The proposed SRAM shows better results as compared with conventional SRAMs in terms of leakage power, write static noise margin, write-ability, read margin, and ...
Pooran Singh, Santosh Kumar Vishvakarma
doaj +1 more source
Sensors, 2023 The need for power-efficient devices, such as smart sensor nodes, mobile devices, and portable digital gadgets, is markedly increasing and these devices are becoming commonly used in daily life.
Sargunam Thirugnanam +3 more
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Active and Passive Electronic Components, 2023 Combining with a static random-access memory (SRAM) and resistive memory (RRAM), an improved 8T2R nonvolatile SRAM (nvSRAM) memory cell is proposed in this study. With differential mode, a pair of 1T1R RRAM is added to 6T SRAM storage node. By optimizing
Jiayu Yin, Wenli Liao, Chengying Chen
doaj +1 more source