Results 41 to 50 of about 295,937 (324)

Review of Physically Unclonable Functions (PUFs): Structures, Models, and Algorithms

open access: yesFrontiers in Sensors, 2022
Physically unclonable functions (PUFs) are now an essential component for strengthening the security of Internet of Things (IoT) edge devices. These devices are an important component in many infrastructure systems such as telehealth, commerce, industry,
Fayez Gebali, Mohammad Mamun
doaj   +1 more source

A 22n March Test for Realistic Static Linked Faults in SRAMs [PDF]

open access: yes, 2006
Linked faults are considered an interesting class of memory faults. Their capability of influencing the behavior of other faults causes the hiding of the fault effect and makes test algorithm design a very complex task.
Benso, Alfredo   +4 more
core   +1 more source

Leakage Controlled Read Stable Static Random Access Memories

open access: yesJournal of Computers, 2008
Semiconductor manufacturing process scaling increases leakage and transistor variations, both of which are problematic for static random access memory (SRAM). Since SRAM is a critical component in modern CMOS integrated circuits, novel approaches to addressing these problems are needed.
Sayeed A. Badrudduza   +3 more
openaire   +1 more source

Radiation Hardened Read-Stability and Speed Enhanced SRAM for Space Applications

open access: yesApplied Sciences
With the advancement of CMOS technology, the susceptibility of SRAM to single node upset (SNU), double node upset (DNU), and multiple node upset (MNU) induced by radiation has increased.
Woo Chang Choi, Sung-Hun Jo
doaj   +1 more source

Self-checking on-line testable static RAM [PDF]

open access: yes, 1993
This is a fault-tolerant random access memory for use in fault-tolerant computers. It comprises a plurality of memory chips each comprising a plurality of on-line testable and correctable memory cells disposed in rows and columns for holding individually
Chau, Savio N., Rennels, David A.
core   +1 more source

Function‐driven design of a surrogate interleukin‐2 receptor ligand

open access: yesFEBS Letters, EarlyView.
Interleukin (IL)‐2 signaling can be achieved and precisely fine‐tuned through the affinity, distance, and orientation of the heterodimeric receptors with their ligands. We designed a biased IL‐2 surrogate ligand that selectively promotes effector T and natural killer cell activation and differentiation. Interleukin (IL) receptors play a pivotal role in
Ziwei Tang   +9 more
wiley   +1 more source

Low-Power 8T SRAM Compute-in-Memory Macro for Edge AI Processors

open access: yesApplied Sciences
The traditional Von Neumann architecture creates bottlenecks due to data movement. The compute-in-memory (CIM) architecture performs computations within memory bit-cell arrays, enhancing computational performance.
Hye-Ju Shin, Sung-Hun Jo
doaj   +1 more source

Combining antibody conjugates with cytotoxic and immune‐stimulating payloads maximizes anti‐cancer activity

open access: yesMolecular Oncology, EarlyView.
Methods to improve antibody–drug conjugate (ADC) treatment durability in cancer therapy are needed. We utilized ADCs and immune‐stimulating antibody conjugates (ISACs), which are made from two non‐competitive antibodies, to enhance the entry of toxic payloads into cancer cells and deliver immunostimulatory agents into immune cells.
Tiexin Wang   +3 more
wiley   +1 more source

Improved hybrid scrubbing scheme for spaceborne static random access memory-based field programmable gate arrays

open access: yesThe Journal of Engineering, 2019
With the shrinking feature sizes of static random access memory-based field programmable gate arrays (FPGAs), the occurrence probability of multiple-cell upsets (MCUs) in FPGAs continues to increase. This reduces the reliability of FPGAs.
Yue Li   +3 more
doaj   +1 more source

Criticality Aware Soft Error Mitigation in the Configuration Memory of SRAM based FPGA

open access: yes, 2018
Efficient low complexity error correcting code(ECC) is considered as an effective technique for mitigation of multi-bit upset (MBU) in the configuration memory(CM)of static random access memory (SRAM) based Field Programmable Gate Array (FPGA) devices ...
Chakrabarti, Amlan   +4 more
core   +1 more source

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