Results 101 to 110 of about 12,742 (221)
npj SpintronicsThe performance and reliability of spin-transfer torque magnetic random-access memory (STT-MRAM) can be compromised by anomalous switching behavior, especially during high-speed operations.
Prosenjit Das +2 more
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Read-Write Circuit for STT-MRAM With Stochastic Switchings
, 2018 Spin-transfer torque magnetic random memory (STT-MRAM) is a promising candidate for universal memory due to its non-volatility, fast access speed, high density, and low power consumption.
박상규
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Simulation of SAF-Enhanced Multilayered STT-MRAM Structures
The reliability of multilayered spin-transfer torque magnetoresistive random access memory with synthetic antiferro-magnets is critical for applications such as computing-in-memory systems, high-performance computing, and high-density storage. This study
Selberherr, Siegfried; orcid: +3 more
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Advanced Electronic MaterialsDouble‐pinned‐layer Magnetic Tunnel Junction (Double PL MTJ) enhances spin‐transfer‐torque magneto‐resistive random‐access memory (STT‐MRAM) performance by requiring anti‐parallel magnetization between both PLs at free layer interfaces and minimizing ...
Shujun Ye, Koichi Nishioka
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Towards Efficient SOT-Assisted STT-MRAM Cell Switching Using Reinforcement Learning
Nonvolatile memory is a promising candidate to replace CMOS devices with the two most common magnetoresistive RAM (MRAM) cell types being spin-transfer torque (STT-)MRAM and spin-orbit torque (SOT-)MRAM.
Sverdlov, Viktor +3 more
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Domain-Specific STT-MRAM-Based In-Memory Computing: A Survey
IEEE AccessIn recent years, the rapid growth of big data and the increasing demand for high-performance computing have fueled the development of novel computing architectures.
Alaba Yusuf +2 more
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An architecture-level cache simulation framework supporting advanced PMA STT-MRAM
, 2015 With integration density on-chip rocketing up, leakage power dominates the whole power budget of contemporary CMOS technology based memory, especially for SRAM based on-chip cache.
Wu, Bi +13 more
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Enhanced write margin of perpendicular MRAM cells using thick MgO cap layer
AIP AdvancesImplementation of spin transfer torque magneto-resistive random access memory (STT-MRAM) in memory chips requires that the write margin of the MRAM cell, defined as the difference between breakdown voltage and write voltage for the specified endurance ...
G. Mihajlović +4 more
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Enabling a reliable STT-MRAM main memory simulation
STT-MRAM is a promising new memory technology with very desirable set of properties such as non-volatility, byte-addressability and high endurance. It has the potential to become the universal memory that could be incorporated to all levels of memory ...
Radojković, Petar +2 more
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A counter-based read circuit tolerant to process variation for low-voltage operating STT-MRAM [PDF]
, 2016 The capacity of embedded memory on LSIs has kept increasing. It is important to reduce the leakage power of embedded memory for low-power LSIs. In fact, the ITRS predicts that the leakage power in embedded memory will account for 40% of all power ...
Umeki, Yohei +8 more
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