Results 81 to 90 of about 17,853 (211)
Research progress and challenges of the self-heating effect in STT-MRAM devices
This paper present a systematic review of recent research progress and outstanding challenges related to the self-heating effect (SHE) in spin-transfer torque magnetic random-access memory (STT-MRAM) devices.
Zhangsheng LAN +3 more
doaj +1 more source
This work presents an analog computing-in-memory (CiM) macro with spin-transfer torque magnetic random access memory (STT-MRAM) and 28-nm CMOS technology.
Xianggao Wang +4 more
doaj +1 more source
Impact of a laser pulse on a STT-MRAM bitcell: security and reliability issues
International audienceThe Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) has been identified, by the International Technology Roadmap for Semiconductors (ITRS), as one of the most promising emerging technology.
Delattre, R. +17 more
core +1 more source
A Timing-Based Split-Path Sensing Circuit for STT-MRAM. [PDF]
Ishdorj B, Kim J, Kim JH, Na T.
europepmc +1 more source
As applications using deep neural networks (DNNs) are increasingly deployed on mobile devices, researchers are exploring various methods to achieve low energy consumption and high performance. Recently, advances in STT-MRAM have shown promise in offering
Munhyung Lee +3 more
doaj +1 more source
MODELING OF MTJ AND ITS VALIDATION USING NANOSCALE MRAM BITCELL [PDF]
Magnetic Tunnel Junction (MTJ) is a promising candidate for nonvolatile and low power memory design. MTJ is basic building block of STT-MRAM bitcell.
CHANDRAMAULESHWAR ROY +2 more
doaj
Investigation of PVT-Aware STT-MRAM Sensing Circuits for Low-VDD Scenario. [PDF]
Bian Z +5 more
europepmc +1 more source
Study of Self-Heating and its Effects in SOT-STT-MRAM
We fully couple magnetization, charge, spin, and temperature dynamics to study the switching of the combined spin-orbit torque (SOT) - spin-transfer torque (STT) magne-toresistive random access memory (MRAM). To account for the increased temperature, the
Selberherr, Siegfried; orcid: +4 more
core +1 more source
A novel SRAM -STT-MRAM hybrid cache implementation improving cache performance
International audienceMemories are currently a real bottleneck to design high speed and energy-efficient systems-on-chip. A significant increase of the performance gap between processors and memories is observed.
Coi, Odilia +9 more
core +1 more source
Standby magnetic immunity calculator for STT-MRAM [PDF]
This work investigates the impact of external magnetic fields, field orientation, temperature, and exposure time on the standby magnetic immunity (SMI) of spin-transfer torque magnetoresistive random-access memory. Wafer-level measurements were performed
A. Talapatra +7 more
doaj +1 more source

