Results 161 to 170 of about 491 (183)
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Fast cacheline-based data replacement for hybrid DRAM and STT-MRAM main memory
IEICE Electronics Express, 2020Chen Lan, Xiaoran Hao
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Reconfigurable Codesign of STT-MRAM Under Process Variations in Deeply Scaled Technology
IEEE Transactions on Electron Devices, 2015Weisheng Zhao +2 more
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Complimentary Polarizers STT-MRAM (CPSTT) for On-Chip Caches
IEEE Electron Device Letters, 2013Xuanyao Fong
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Reducing Switching Latency and Energy in STT-MRAM Caches With Field-Assisted Writing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016Eby Friedman, Engin Ipek
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R-MRAM: A ROM-Embedded STT MRAM Cache
IEEE Electron Device Letters, 2013Xuanyao Fong, Dongsoo Lee
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Read disturbance issue and design techniques for nanoscale STT-MRAM
Journal of Systems Architecture, 2016Weisheng Zhao, Yi Ran, Wang Kang
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Life-time degradation of STT-MRAM by self-heating effect with TDDB model
Solid-State Electronics, 2020Yanfeng Jiang
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Review of STT-MRAM circuit design strategies, and a 40-nm 1T-1MTJ 128Mb STT-MRAM design practice
2020Hiroaki Honjo, Mitsuo Yasuhira
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Auxiliary Roles in STT-MRAM Memory.
2014Computer memories now play a key role in our everyday life given the increase in the number of connected smart devices and wearables. Recently post-CMOS memory technologies are gaining significant research attention along with the regular ones. Spin Transfer Torque Magnetoresistive RAM (STT-MRAM) is one such post-CMOS memory technology with a rapidly ...
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