Results 161 to 170 of about 491 (183)
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Fast cacheline-based data replacement for hybrid DRAM and STT-MRAM main memory

IEICE Electronics Express, 2020
Chen Lan, Xiaoran Hao
exaly  

Reconfigurable Codesign of STT-MRAM Under Process Variations in Deeply Scaled Technology

IEEE Transactions on Electron Devices, 2015
Weisheng Zhao   +2 more
exaly  

Complimentary Polarizers STT-MRAM (CPSTT) for On-Chip Caches

IEEE Electron Device Letters, 2013
Xuanyao Fong
exaly  

Reducing Switching Latency and Energy in STT-MRAM Caches With Field-Assisted Writing

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016
Eby Friedman, Engin Ipek
exaly  

R-MRAM: A ROM-Embedded STT MRAM Cache

IEEE Electron Device Letters, 2013
Xuanyao Fong, Dongsoo Lee
exaly  

Read disturbance issue and design techniques for nanoscale STT-MRAM

Journal of Systems Architecture, 2016
Weisheng Zhao, Yi Ran, Wang Kang
exaly  

Auxiliary Roles in STT-MRAM Memory.

2014
Computer memories now play a key role in our everyday life given the increase in the number of connected smart devices and wearables. Recently post-CMOS memory technologies are gaining significant research attention along with the regular ones. Spin Transfer Torque Magnetoresistive RAM (STT-MRAM) is one such post-CMOS memory technology with a rapidly ...
openaire   +1 more source

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