Results 31 to 40 of about 12,742 (221)
Read disturb fault detection in STT-MRAM [PDF]
Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) has potential to become a universal memory technology because of its various advantageous features such as high density, non-volatility, scalability, high endurance and CMOS compatibility.
Bishnoi, R. +3 more
openaire +2 more sources
Perpendicular shape anisotropy (PSA) and double magnetic tunnel junctions (DMTJs) offer practical solutions to downscale spin-transfer-torque Magnetic Random-Access Memory (STT-MRAM) beyond 20 nm technology nodes, while retaining their thermal stability ...
Trevor P. Almeida +7 more
doaj +1 more source
A Comparative Analysis on the Impact of Bank Contention in STT-MRAM and SRAM Based LLCs
Spin Transfer Torque Magnetic RAM (STT-MRAM) is being extensively considered as a promising replacement for Last Level Caches (LLC), due to its high density, low leakage and non-volatility. However, writes to STT-MRAM are energy intensive and have a high
Christian Tenllado +19 more
core +1 more source
Embedded systems to high performance computing using STT-MRAM
International audienceThe scaling limits of CMOS have pushed many researchers to explore alternative technologies for beyond CMOS circuits. In addition to the increased device variability and process complexity led by the continuous decreasing size of ...
Coi, Odilia +15 more
core +1 more source
Compute-in-memory (CIM) accelerator has become a popular solution to achieve high energy efficiency for deep learning applications in edge devices. Recent works have demonstrated CIM macros using nonvolatile memories [spin transfer torque (STT)-MRAM and ...
Vinod Kurian Jacob +5 more
doaj +1 more source
System level exploration of a STT-MRAM based level 1 data-cache
Since Non-Volatile Memory (NVM) technologies are being explored extensively nowadays as viable replacements for SRAM based memories in LLCs and even L2 caches, we try to take stock of their potential as level 1 (L1) data caches.
Gómez Pérez, José Ignacio +4 more
core +1 more source
Enabling a reliable STT-MRAM main memory simulation [PDF]
STT-MRAM is a promising new memory technology with very desirable set of properties such as non-volatility, byte-addressability and high endurance. It has the potential to become the universal memory that could be incorporated to all levels of memory ...
Radojković, Petar +6 more
core +1 more source
Correlation power analysis attack against STT-MRAM based cyptosystems [PDF]
Emerging technologies such as Spin-transfer torque magnetic random-access memory (STT-MRAM) are considered potential candidates for implementing low-power, high density storage systems.
Ankit Mondal +2 more
core +1 more source
A reconfigurable physical unclonable function is developed using CMOS‐integrated SOT‐MRAM chips, leveraging a dual‐pulse strategy and offering enhanced environmental robustness. A temperature‐compensation effect arising from the CMOS transistor and SOT‐MTJ is revealed and established as a key prerequisite for thermal resilience.
Min Wang +7 more
wiley +1 more source
In this work, low‐resolution infrared imaging is combined with a 28 nm FeFET IMC architecture to enable compact, energy‐efficient edge inference. MLC FeFET devices are experimentally characterized, and controlled multi‐level current accumulation is validated at crossbar array level.
Alptekin Vardar +9 more
wiley +1 more source

