Results 11 to 20 of about 401 (157)
A Survey of Soft-Error Mitigation Techniques for Non-Volatile Memories
Computers, 2017 Non-volatile memories (NVMs) offer superior density and energy characteristics compared to the conventional memories; however, NVMs suffer from severe reliability issues that can easily eclipse their energy efficiency advantages. In this paper, we survey
Sparsh Mittal
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Spin-Hall Assisted STT-RAM Design and Discussion [PDF]
Proceedings of the 18th System Level Interconnect Prediction Workshop, 2016 In recent years, Spin-Transfer Torque Random Access Memory (STT-RAM) has attracted significant attentions from both industry and academia due to its attractive attributes such as small cell area and non-volatility. However, long switching time and large programming energy of Magnetic Tunneling Junction (MTJ) continue being major challenges in STT-RAM ...
Enes Eken +6 more
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SMART: A Secure Magnetoelectric AntifeRromagnet-Based Tamper-Proof Non-Volatile Memory
IEEE Access, 2020 The storage industry is moving toward emerging non-volatile memories (NVMs), including the spin-transfer torque magnetoresistive random-access memory (STT-MRAM) and the phase-change memory (PCM), owing to their high density and low-power operation.
Nikhil Rangarajan +4 more
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A Spintronic 2M/7T Computation-in-Memory Cell
Journal of Low Power Electronics and Applications, 2022 Computing data-intensive applications on the von Neumann architecture lead to significant performance and energy overheads. The concept of computation in memory (CiM) addresses the bottleneck of von Neumann machines by reducing the data movement in the ...
Atousa Jafari +2 more
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A Full-Sensing-Margin Dual-Reference Sensing Scheme for Deeply-Scaled STT-RAM
IEEE Access, 2018 Spin transfer torque-random access memory (STT-RAM) has recently been regarded as one of the most promising non-volatile memory candidates for the next-generation computer architectures.
He Zhang +4 more
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Design and Evaluation of a 28-nm FD-SOI STT-MRAM for Ultra-Low Power Microcontrollers
IEEE Access, 2019 The complexity of embedded devices increases as today's applications request always more services. However, the power consumption of systems-on-chip has significantly increased due to the high-density integration and the high leakage power of current ...
Guillaume Patrigeon +5 more
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Study on Energy Reduction Techniques in STT-RAM
Journal of Physics: Conference Series, 2021 Abstract Spin Transfer Torque Random Access Memory (STT-RAM) is suitable to be considered for cosmic memory. In STT-RAM the altercative period of attractive burrowing intersection is exchanged by the showing up of turn enraptured current over the intersection and it appear to be the most preparing elective with the more thickness and low
Vura Sai Durga Eswar +2 more
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DESTINY: A Comprehensive Tool with 3D and Multi-Level Cell Memory Modeling Capability
Journal of Low Power Electronics and Applications, 2017 To enable the design of large capacity memory structures, novel memory technologies such as non-volatile memory (NVM) and novel fabrication approaches, e.g., 3D stacking and multi-level cell (MLC) design have been explored.
Sparsh Mittal +2 more
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Read-Tuned STT-RAM and eDRAM Cache Hierarchies for Throughput and Energy Optimization
IEEE Access, 2018 As capacity and complexity of on-chip cache memory hierarchy increases, the service cost to the critical loads from last level cache (LLC), which are frequently repeated, has become a major concern.
Navid Khoshavi, Ronald F. Demara
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Evaluating STT-RAM as an energy-efficient main memory alternative [PDF]
2013 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2013 In this paper, we explore the possibility of using STT-RAM technology to completely replace DRAM inmain memory. Our goal is to make STT-RAM performance comparable to DRAM while providing substantial power savings. Towards this goal, we first analyze the performance and energy of STT-RAM, and then identify key optimizations that can be employed to ...
Emre Kultursay +3 more
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