Results 21 to 30 of about 129,221 (220)

Preventing STT-RAM Last-Level Caches from Port Obstruction [PDF]

open access: bronze, 2014
Many new nonvolatile memory (NVM) technologies have been heavily studied to replace the power-hungry SRAM/DRAM-based memory hierarchy in today's computers.
Wang, Jue, Dong, Xiangyu, Xie, Yuan
core   +2 more sources

Spin-Hall Assisted STT-RAM Design and Discussion [PDF]

open access: goldProceedings of the 18th System Level Interconnect Prediction Workshop, 2016
In recent years, Spin-Transfer Torque Random Access Memory (STT-RAM) has attracted significant attentions from both industry and academia due to its attractive attributes such as small cell area and non-volatility. However, long switching time and large programming energy of Magnetic Tunneling Junction (MTJ) continue being major challenges in STT-RAM ...
Enes Eken   +6 more
openalex   +2 more sources

Restore-Free Mode for MLC STT-RAM Caches

open access: yesIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2019
Spin-transfer torque RAM (STT-RAM) caches are foreseen to replace traditional static RAM caches because of their nonvolatile nature and high density.
Qureshi, Muhammad Avais   +2 more
core   +2 more sources

SCART: Predicting STT-RAM Cache Retention Times Using Machine Learning [PDF]

open access: green, 2019
Prior studies have shown that the retention time of the non-volatile spin-transfer torque RAM (STT-RAM) can be relaxed in order to reduce STT-RAM\u27s write energy and latency.
Gajaria, Dhruv   +2 more
core   +2 more sources

Leveraging MLC STT-RAM for energy-efficient CNN training [PDF]

open access: bronzeProceedings of the International Symposium on Memory Systems, 2018
Graphics Processing Units (GPUs) are extensively used in training of convolutional neural networks (CNNs) due to their promising compute capability. However, GPU memory capacity, bandwidth, and energy are becoming critical system bottlenecks with increasingly larger and deeper training models.
Hengyu Zhao, Jishen Zhao
openalex   +2 more sources

Error Characterization and Correction Techniques for Reliable STT-RAM Designs [PDF]

open access: green, 2015
The concerns on the continuous scaling of mainstream memory technologies have motivated tremendous investment to emerging memories. Being a promising candidate, spin-transfer torque random access memory (STT-RAM) offers nanosecond access time comparable ...
Wen, Wujie
core   +1 more source

Evaluating STT-RAM as an energy-efficient main memory alternative [PDF]

open access: green2013 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2013
In this paper, we explore the possibility of using STT-RAM technology to completely replace DRAM inmain memory. Our goal is to make STT-RAM performance comparable to DRAM while providing substantial power savings. Towards this goal, we first analyze the performance and energy of STT-RAM, and then identify key optimizations that can be employed to ...
Emre Kültürsay   +3 more
openalex   +3 more sources

A Statistical STT-RAM Design View and Robust Designs at Scaled Technologies [PDF]

open access: green, 2017
Rapidly increased demands for memory in electronic industry and the significant technical scaling challenges of all conventional memory technologies motivated the researches on the next generation memory technology.
Zhang, Yaojun, Chen, Yiran
core   +1 more source

Developing Variation Aware Simulation Tools, Models, and Designs for STT-RAM [PDF]

open access: green, 2018
DEVELOPING VARIATION AWARE SIMULATION TOOLS, MODELS, AND DESIGNS FOR STT-RAM Enes Eken, PhD University of Pittsburgh, 2017 In recent years, we have been witnessing the rise of spin-transfer torque random access memory (STT-RAM) technology. There are
Eken, Enes
core   +1 more source

PS3-RAM: A Fast Portable and Scalable Statistical STT-RAM Reliability/Energy Analysis Method

open access: yesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2014
The development of emerging spin-transfer torque random access memory (STT-RAM) is facing two major technical challenges-poor write reliability and high write energy, both of which are severely impacted by process variations and thermal fluctuations. The
Wujie Wen, Yaojun Zhang, Yiran Chen
exaly   +2 more sources

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