Results 41 to 50 of about 1,678 (162)
Low Power Design for Future Wearable and Implantable Devices
With the fast progress in miniaturization of sensors and advances in micromachinery systems, a gate has been opened to the researchers to develop extremely small wearable/implantable microsystems for different applications.
Katrine Lundager +4 more
doaj +1 more source
Capacitive, charge‐domain compute‐in‐memory (CIM) stores weights as capacitance,eliminating DC sneak paths and IR‐drop, yielding near‐zero standbypower. In this perspective, we present a device to systems level performance analysis of most promising architectures and predict apathway for upscaling capacitive CIM for sustainable edge computing ...
Kapil Bhardwaj +2 more
wiley +1 more source
An Adaptive ECC Scheme for Runtime Write Failure Suppression of STT-RAM Cache [PDF]
Spin-transfer torque random access memory (STT-RAM) features many attractive charac- teristics, including near-zero standby power, nanosecond access time, small footprint, etc.
Wang, Xue
core
Electric control of magnetic tunnel junctions offers a path to drastically reduce the energy requirements of the device. Electric field control of magnetization can be realized in a multitude of ways. These mechanisms can be integrated into existing spintronic devices to further reduce the operational energy.
Will Echtenkamp +7 more
wiley +1 more source
Triboelectric nanogenerators are vital for sustainable energy in future technologies such as wearables, implants, AI, ML, sensors and medical systems. This review highlights improved TENG neuromorphic devices with higher energy output, better stability, reduced power demands, scalable designs and lower costs.
Ruthran Rameshkumar +2 more
wiley +1 more source
A Study on Performance and Power Efficiency of Dense Non-Volatile Caches in Multi-Core Systems
In this paper, we present a novel cache design based on Multi-Level Cell Spin-Transfer Torque RAM (MLC STTRAM) that can dynamically adapt the set capacity and associativity to use efficiently the full potential of MLC STTRAM.
Arjomand, Mohammad +3 more
core +1 more source
STT-HDC: An Efficient Time-Domain In-Memory Hyper-Dimensional Computing Design Based on STT-MRAM
This paper presents an efficient in-memory hyperdimensional computing (HDC) design based on spin transfer-torque magnetoresistive RAM (STT-MRAM), named STT-HDC. A novel time-domain sense amplifier circuit is proposed that significantly simplifies Hamming
Thi-Nhan Pham +3 more
doaj +1 more source
A universal temperature‐friendly nonvolatile MRAM (UTF‐NVMRAM) operating from 4 to 400K is realized by optimizing the MgO/MgOx capping layer and incorporating Mo into the CoFeB composite‐free layer. This architecture minimizes temperature sensitivity in switching voltage and thermal stability factor while demonstrating potential CMOS back‐end‐of‐line ...
Ming‐Chun Hong +21 more
wiley +1 more source
Abstract The fossil record of coelacanths (Actinistia) is diminished by several nominal gaps that obscure vital information pertaining to the clade's evolutionary history. Latimeriidae, the family that includes the extant coelacanth Latimeria, in addition to the Cenozoic, has an outstanding missing gap of 50 myr during the Mesozoic, with no records of ...
Jack L. Norton +4 more
wiley +1 more source
Magnetic phase transitions in Ta/CoFeB/MgO multilayers
We study thin films and magnetic tunnel junction nanopillars based on Ta/Co$_{20}$Fe$_{60}$B$_{20}$/MgO multilayers by electrical transport and magnetometry measurements. These measurements suggest that an ultrathin magnetic oxide layer forms at the Co$_{
A. M. Gonçalves +12 more
core +3 more sources

