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Advanced Electronic Materials, Volume 12, Issue 1, 7 January 2026.Processing‐in‐memory (PIM) architectures based on memristors offer significant potential for low‐power computation and the realization of novel computing paradigms by performing logic operations directly within memory. This review summarizes recent advances in memristor‐based logic techniques, with particular emphasis on reliability considerations and ...
Thomas Neuner +5 more
wiley +1 more source
A compact model of stochastic switching in STT magnetic RAM for memory and computing
, 2019 Spin-transfer torque random access memory (STT-RAM) is gaining momentum as a promising technology for high density and embedded nonvolatile memory. To enable the design of STT-RAM circuits for memory and computing, there is a need for accurate compact ...
Ielmini D. +6 more
core +1 more source
7A-5 A Coherent Hybrid SRAM and STT-RAM L1 Cache Architecture for Shared Memory Multicores
, 2014 — STT-RAM is an emerging NVRAM technology that promises high density, low energy and a comparable access speed to conventional SRAM. This paper proposes a hybrid L1 cache architecture that incorporates both SRAM and STT-RAM.
Jianxing Wang +6 more
core +1 more source
Mitigating Read Disturbance Errors in STT-RAM Caches by Using Data Compression
, 2019 Due to its high density and close to SRAM read latency, spin transfer torque RAM (STT-RAM) is considered one of the most promising emerging memory technologies for designing large last level caches (LLCs).
Mittal, Sparsh
core +1 more source
Cross-Layer Optimization for Multilevel Cell STT-RAM Caches
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017 Spin-transfer torque random access memory (STT-RAM), as an emerging nonvolatile memory technology, provides very dense array structure and extremely low leakage power consumption. It demonstrates a great potential in replacing conventional static random access memory technology to develop the next-generation on-chip cache memory of microprocessors and ...
Xiuyuan Bi +3 more
openaire +2 more sources
, 2012 Process variations and thermal fluctuations significantly affect the write reliability of spin-transfer torque random access memory (STT-RAM). Traditionally, modeling the impacts of these variations on STT-RAM designs requires expensive Monte-Carlo runs ...
Wen, Wujie +9 more
core +1 more source
Neuromorphic Hardware Accelerator for SNN Inference based on STT-RAM Crossbar Arrays
, 2019 In this paper, we propose a Spin Transfer Torque RAM (STT-RAM) based neurosynaptic core to implement a hardware accelerator for Spiking Neural Networks (SNNs), which mimic the time-based signal encoding and processing mechanisms of the human brain.
Jae-Sun Seo +9 more
core +1 more source
Error Characterization and Correction Techniques for Reliable STT-RAM Designs [PDF]
, 2015 The concerns on the continuous scaling of mainstream memory technologies have motivated tremendous investment to emerging memories. Being a promising candidate, spin-transfer torque random access memory (STT-RAM) offers nanosecond access time comparable ...
Wen, Wujie
core
OSCAR: Orchestrating STT-RAM cache traffic for heterogeneous CPU-GPU architectures
, 2016 As we integrate data-parallel GPUs with general-purpose CPUs on a single chip, the enormous cache traffic generated by GPUs will not only exhaust the limited cache capacity, but also severely interfere with CPU requests.
Jia Zhan +9 more
core +1 more source
STT-RAM-Based Domain-Specific Architectures for Resource-Constrained Systems
, 2023 Resource-constrained consumer devices such as embedded systems, wearables, smartphones, etc., have become some of the fastest-growing products. Unlike general-purpose systems, resource-constrained devices are expected to perform various tasks within ...
GAJARIA, DHRUV MAYUR
core +1 more source