Results 51 to 60 of about 129,221 (220)
DESTINY: A Comprehensive Tool with 3D and Multi-Level Cell Memory Modeling Capability
Journal of Low Power Electronics and Applications, 2017 To enable the design of large capacity memory structures, novel memory technologies such as non-volatile memory (NVM) and novel fabrication approaches, e.g., 3D stacking and multi-level cell (MLC) design have been explored.
Sparsh Mittal +2 more
doaj +1 more source
coqui-ai/STT: Coqui STT 1.4.0-alpha.3
, 2022 STT - The deep learning toolkit for Speech-to-Text.
Chris Lord +30 more
core +1 more source
Design and Analysis of an Ultra-Dense, Low-Leakage, and Fast FeFET-Based Random Access Memory Array
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2019 High static power associated with static random access memory (SRAM) represents a bottleneck in increasing the amount of on-chip memory. Novel, emerging nonvolatile memories such as spintransfer torque magnetic random access memory (STT-RAM), resistive ...
Dayane Reis +11 more
doaj +1 more source
AIP Advances, 2017 We present a detailed numerical analysis of switching efficiency for the recently proposed dual referenced composite free layer structure with respect to Gilbert damping. Low anisotropy assistive layers enable reduction of Gilbert damping and an increase
Roy Bell, Jiaxi Hu, R. H. Victora
doaj +1 more source
Multi-Port 1R1W Transpose Magnetic Random Access Memory by Hierarchical Bit-Line Switching
IEEE Access, 2019 Emerging Magnetic Random-Access Memory (MRAM) has shown a great potential to replace Static-RAM (SRAM) and Dynamic-RAM (DRAM) in the working memories including Cache and main memory. MRAM benefits from its high-density, fast speed, low standby power, and
Liang Chang +3 more
doaj +1 more source
coqui-ai/STT: Coqui STT v0.10.0-alpha.25
, 2021 The deep learning toolkit for Speech-to-Text.
Chris Lord +29 more
core +1 more source
TTEC: Data Allocation Optimization for Morphable Scratchpad Memory in Embedded Systems
IEEE Access, 2018 Scratchpad memory (SPM) is widely utilized in many embedded systems as a software-controlled on-chip memory to replace the traditional cache. New non-volatile memory (NVM) has emerged as a promising candidate to replace SRAM in SPM, due to its ...
Linbo Long +3 more
doaj +1 more source
Evaluating STT-RAM as an Energy-Efficient Main Memory Alternative
, 2018 In this paper, we explore the possibility of using STT-RAM technology to completely replace DRAM inmain memory. Our goal is to make STT-RAM performance comparable to DRAM while providing substantial power savings.
Onur Mutlu (5357288) +3 more
core +1 more source
Advanced Science, EarlyView.A reconfigurable physical unclonable function is developed using CMOS‐integrated SOT‐MRAM chips, leveraging a dual‐pulse strategy and offering enhanced environmental robustness. A temperature‐compensation effect arising from the CMOS transistor and SOT‐MTJ is revealed and established as a key prerequisite for thermal resilience.
Min Wang +7 more
wiley +1 more source