Results 1 to 10 of about 13,751 (195)

A novel ultra-steep subthreshold swing iTFET with control gate and control source biasing [PDF]

Scientific Reports
In this paper, we propose a novel structure with Control Source and Control Gate structured tunnel field-effect transistor (CSCG‑iTFET), which achieves an unprecedentedly steep subthreshold swing (SS) while maintaining high ON-state current ( $$\:{I}_ ...
Jyi-Tsong Lin, Ruei-Cheng Tu
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Subthreshold Swing in Silicon Gate-All-Around Nanowire and Fully Depleted SOI MOSFETs at Cryogenic Temperature

IEEE Journal of the Electron Devices Society, 2021
Subthreshold swing (SS) in a silicon gate-all-around (GAA) nanowire MOSFET with zero body factor is examined from room temperature (RT) down to 4 K. A fully depleted (FD) SOI MOSFET is also evaluated.
Shohei Sekiguchi, Min-Ju Ahn, Tomoko Mizutani, Takuya Saraya, Masaharu Kobayashi, Toshiro Hiramoto   +5 more
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ZrO x Negative Capacitance Field-Effect Transistor with Sub-60 Subthreshold Swing Behavior

Nanoscale Research Letters, 2021
Here we report the ZrO x -based negative capacitance (NC) FETs with 45.06 mV/decade subthreshold swing (SS) under ± 1 V V GS range, which can achieve new opportunities in future voltage-scalable NCFET applications.
Siqing Zhang, Huan Liu, Jiuren Zhou, Yan Liu, Genquan Han, Yue Hao   +5 more
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Effects of channel length on temperature dependence of apparent subthreshold swing in self-aligned top-gate coplanar IGZO thin-film transistors [PDF]

Scientific Reports
This study investigates how channel length (L) affects the temperature dependence of the apparent subthreshold swing (SS *) in self-aligned top-gate coplanar indium-gallium-zinc oxide (IGZO) thin-film transistors (TFTs).
Chae-Eun Oh, Hwan-Seok Jeong, Su-Hyeon Lee, Hyeon-Woo Lee, Dong-Hwi Son, Chang-Hyeon Kim, Myeong-Ho Kim, Kyoung-Seok Son, Jun Hyung Lim, Sang-Hun Song, Hyuck-In Kwon   +10 more
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FS-iTFET: advancing tunnel FET technology with Schottky-inductive source and GAA design [PDF]

Discover Nano
In this paper, we introduce a novel Forkshape nanosheet Inductive Tunnel Field-Effect Transistor (FS-iTFET) featuring a Gate-All-Around structure and a full-line tunneling heterojunction channel.
Jyi-Tsong Lin, Wei-Heng Tai
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Effect of Gate Length Scaling on Various Performance Parameters in DG-FinFETs: a Simulation Study [PDF]

Журнал нано- та електронної фізики, 2012
This paper presents a simulation study on the gate length scaling of a double gate (DG) FinFET. To achieve channel lengths smaller than 20 nm, innovative device architectures will be necessary to continue the benefits previously acquired through scaling.
Rakesh Vaid, Meenakshi Chandel
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Dual source negative capacitance GaSb/InGaAsSb/InAs heterostructure based vertical TFET with steep subthreshold swing and high on-off current ratio

Results in Physics, 2021
Continuous downscaling of CMOS technology at the nanometer scale with conventional MOSFETs leads to short channel effects (SCE), increased subthreshold slope (SS), and leakage current, degrading the performance of ICs.
Minhaz Uddin Sohag, Md. Sherajul Islam, Kamal Hosen, Md. Al Imran Fahim, Md. Mosarof Hossain Sarkar, Jeongwon Park   +5 more
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Low-Power OR Logic Ferroelectric In-Situ Transistor Based on a CuInP₂S₆/MoS₂ Van Der Waals Heterojunction

Nanomaterials, 2021
Due to the limitations of thermodynamics, the Boltzmann distribution of electrons hinders the further reduction of the power consumption of field-effect transistors.
Kun Yang, Shulong Wang, Tao Han, Hongxia Liu   +3 more
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Highly Sensitive Detection of Urea Using Si Electrolyte-Gated Transistor with Low Power Consumption

Biosensors, 2023
We experimentally demonstrate Si-based electrolyte-gated transistors (EGTs) for detecting urea. The top-down-fabricated device exhibited excellent intrinsic characteristics, including a low subthreshold swing (SS) (~80 mV/dec) and a high on/off current ...
Wonyeong Choi, Bo Jin, Seonghwan Shin, Jeonghyeon Do, Jongmin Son, Kihyun Kim, Jeong-Soo Lee   +6 more
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Improved Subthreshold Characteristics by Back-Gate Coupling on Ferroelectric ETSOI FETs

Nanoscale Research Letters, 2022
In this work, extremely thin silicon-on-insulator field effective transistors (ETSOI FETs) are fabricated with an ultra-thin 3 nm ferroelectric (FE) hafnium zirconium oxides (Hf0.5Zr0.5O2) layer.
Zhaohao Zhang, Yudong Li, Jing Xu, Bo Tang, Jinjuan Xiang, Junjie Li, Qingzhu Zhang, Zhenhua Wu, Huaxiang Yin, Jun Luo, Wenwu Wang   +10 more
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