Results 51 to 60 of about 48,643 (286)

A Biomedical Sensor System With Stochastic A/D Conversion and Error Correction by Machine Learning

open access: yesIEEE Access, 2019
This paper presents a high-precision biomedical sensor system with a novel analog-frontend (AFE) IC and error correction by machine learning. The AFE IC embeds an analog-to-digital converter (ADC) architecture called successive stochastic approximation ...
Yusaku Hirai   +6 more
doaj   +1 more source

11 b 200 MS/s 28‐nm CMOS 2b/cycle successive‐approximation register analogue‐to‐digital converter using offset‐mismatch calibrated comparators

open access: yesElectronics Letters, 2023
This letter presents an 11 b 200 MS/s 28 nm CMOS 2b/cycle successive‐approximation register (SAR) analogue‐to‐digital converter (ADC). The offset calibration technique is proposed to reduce the comparator offset mismatch that degrades the linearity of ...
Jaehyuk Lee   +9 more
doaj   +1 more source

An 11.8-fJ/Conversion-Step Noise Shaping SAR ADC with Embedded Passive Gain for Energy-Efficient IoT Sensors

open access: yesSensors, 2022
Herein, we present a noise shaping successive-approximation-register (SAR) analog-to-digital converter (ADC) with an embedded passive gain multiplication technique.
Changhyung Choi, Jong-Wook Lee
doaj   +1 more source

Feasibility and Preliminary Efficacy of Integrative Neuromuscular Training for Childhood Cancer Survivors: A Pilot Study

open access: yesPediatric Blood &Cancer, EarlyView.
ABSTRACT Background Survivors of childhood acute lymphoblastic leukemia (ALL) often exhibit early deficits in muscle and movement competence, which can compromise long‐term health. Integrative neuromuscular training (INT), a multifaceted approach combining fundamental movement activities with strength exercises, may help address these deficits during ...
Anna Maria Markarian   +7 more
wiley   +1 more source

An Amplifier-Less Acquisition Chain for Power Measurements in Series Resonant Inverters

open access: yesSensors, 2019
Successive approximation register (SAR) analog-to-digital converter (ADC) manufacturers recommend the use of a driver amplifier to achieve the best performance.
Jorge Villa   +3 more
doaj   +1 more source

A Poly Resistor Based Time Domain CMOS Temperature Sensor with 9b SAR and Fine Delay Line

open access: yesSensors, 2020
This paper presents a new type of time domain CMOS temperature sensor with a 9b successive approximation register (SAR) control logic and a fine delay line. We adopted an N-type poly resistor as the sensing element for temperature linearity. The chip was
Zhiwei Xu, Sangjin Byun
doaj   +1 more source

Barycentres and Hurricane Trajectories [PDF]

open access: yes, 2014
The use of barycentres in data analysis is illustrated, using as example a dataset of hurricane trajectories.Comment: 19 pages, 7 figures. Contribution to Mardia festschrift "Geometry Driven Statistics".
Afsari   +26 more
core   +1 more source

Transferrin receptor 1‐mediated iron uptake supports thermogenic activation in human cervical‐derived adipocytes

open access: yesFEBS Letters, EarlyView.
In this study, we found that human cervical‐derived adipocytes maintain intracellular iron level by regulating the expression of iron transport‐related proteins during adrenergic stimulation. Melanotransferrin is predicted to interact with transferrin receptor 1 based on in silico analysis.
Rahaf Alrifai   +9 more
wiley   +1 more source

Structural insights into an engineered feruloyl esterase with improved MHET degrading properties

open access: yesFEBS Letters, EarlyView.
A feruloyl esterase was engineered to mimic key features of MHETase, enhancing the degradation of PET oligomers. Structural and computational analysis reveal how a point mutation stabilizes the active site and reshapes the binding cleft, expading substrate scope.
Panagiota Karampa   +5 more
wiley   +1 more source

ACE16K: A 128×128 focal plane analog processor with digital I/O [PDF]

open access: yes, 2002
This paper presents a new generation 128×128 focal-plane analog programmable array processor (FPAPAP), from a system level perspective, which has been manufactured in a 0.35 μm standard digital 1P-5M CMOS technology. The chip has been designed to achieve
Domínguez Castro, Rafael   +3 more
core   +1 more source

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