Results 81 to 90 of about 24,114 (195)
Next generation of TCAD environments for MEMS design [PDF]
Submitted on behalf of EDA Publishing Association (http://irevues.inist.fr/handle/2042/16838)
Triltsch, Udo, Büttgenbach, Stephanus
openaire +3 more sources
The characteristics of a vertical floating gate heterostructure transistor device that exhibits neuromorphic potentiation under visible light illumination are investigated. Due to spectrally‐tuned absorbance properties of each thin film layer and introduction of tunneling dielectric, the device enables wavelength‐selective tuning of synaptic plasticity
Seungme Kang +12 more
wiley +1 more source
Electrical TCAD Simulation of STT-MRAMs
In this paper, we propose to develop a full TCAD simulation, using a commercial tool (Sentaurus), of an STT-MRAM device to better understand its electrical behavior. To our knowledge, it is the first time that a simulated I-V hysteresis loop is calibrated on experimental data.
Saifi, Hanane +8 more
openaire +2 more sources
Using Bayesian Optimization to Increase the Efficiency of III‐V Multijunction Solar Cells
Technology Computer Aided Design (TCAD) modeling is crucial for designing complex optoelectronic devices like III‐V multijunction solar cells. Bayesian optimization is proposed as a robust method to address challenges in optimizing costly black‐box TCAD solvers.
Pablo F. Palacios, Carlos Algora
wiley +1 more source
Gate‐length engineering in recessed‐gate enhancement‐mode β‐Ga2O3 metal‐oxide‐semiconductor filed effect transistors was investigated by extending the gate to fully cover the etched recess. Complete recess coverage improves electrostatic control, reduces series resistance, shifts the threshold voltage positively, and enhances mobility, on‐resistance ...
Ching‐Hsuan Lee +7 more
wiley +1 more source
A complementary charge‐trap memristor (CoCTM) featuring a unique current transient with tunable overshoot‐relaxation dynamics is introduced for high‐resolution reservoir computing. By leveraging higher‐order temporal dynamics from engineered trapping layers, the device generates multiple output states from a single input, forming rich, high‐dimensional
Alba Martinez +9 more
wiley +1 more source
Powernet: SOI Lateral Power Device Breakdown Prediction With Deep Neural Networks
The breakdown performance is a critical metric for power device design. This paper explores the feasibility of efficiently predicting the breakdown performance of silicon on insulator (SOI) lateral power device using multi-layer neural networks as an ...
Jing Chen +6 more
doaj +1 more source
Modeling Radiation Damage to Pixel Sensors in the ATLAS Detector
Silicon pixel detectors are at the core of the current ATLAS detector and its planned upgrade. As the detectors in closest proximity to the interaction point, they will be exposed to a significant amount of radiation: prior to the HL-LHC, the innermost ...
Nachman, Benjamin
core
This paper investigates, using Synopsys Sentaurus TCAD simulation, the dependence of the breakdown voltage of n-on-p backside-illumination Silicon Photomultipliers (BSI-SiPM) on the implantation dose, the implantation energy and the screening SiO2 ...
Ran He +7 more
doaj +1 more source
Novel Silicon n-on-p Edgeless Planar Pixel Sensors for the ATLAS upgrade
In view of the LHC upgrade phases towards HL-LHC, the ATLAS experiment plans to upgrade the Inner Detector with an all-silicon system. The n-on-p silicon technology is a promising candidate for the pixel upgrade thanks to its radiation hardness and cost ...
Bagolini, A. +9 more
core +1 more source

