Results 31 to 40 of about 29,463 (289)
A 2-set-up Routley-Meyer Semantics for the 4-valued Relevant Logic E4 [PDF]
, 2016 The logic BN4 can be considered as the 4-valued logic of the relevant conditional and the logic E4, as the 4-valued logic of (relevant) entailment. The aim of this paper is to endow E4 with a 2-set-up Routley-Meyer semantics.
Blanco, José M. +4 more
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Ternary logic design in topological quantum computing
Journal of Physics A: Mathematical and Theoretical, 2022 Abstract A quantum computer can perform exponentially faster than its classical counterpart. It works on the principle of superposition. But due to the decoherence effect, the superposition of a quantum state gets destroyed by the interaction with the environment.
Muhammad Ilyas +2 more
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Schaefer's theorem for graphs [PDF]
, 2015 Schaefer's theorem is a complexity classification result for so-called Boolean constraint satisfaction problems: it states that every Boolean constraint satisfaction problem is either contained in one out of six classes and can be solved in polynomial ...
Bodirsky, Manuel, Pinsker, Michael
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Logical Principles in Ternary Mathematics
Asian Journal of Research in Computer Science, 2021 Introduction/Background:Our new research called “Logical Principles in Ternary Mathematics“ is an attempt to establish connection between logical and mathematical principles governing Ternary Mathematics and address issues that appeared earlier while making truth tables for “Ternary addition” and “Ternary Multiplication” presented by the same author ...
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An RTL-Based General Synthesis Methodology for Device-Independent Ternary Logic Circuits
IEEE AccessTernary logic circuits are considered a high-potential alternative that can continue the technological advance of binary logic. Current studies in ternary logic focus on two aspects: One focuses on designing specific ternary circuits (such as adders ...
Hanmok Park +3 more
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From static ternary adders to high-performance race-free dynamic ones
The Journal of Engineering, 2015 This study explores the suitability of dynamic logic style in ternary logic. It presents high-performance dynamic ternary half and full adders, which are essential components in computer arithmetic.
Shirin Rezaie +4 more
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Relational Width of First-Order Expansions of Homogeneous Graphs with Bounded Strict Width [PDF]
, 2020 Solving the algebraic dichotomy conjecture for constraint satisfaction problems over structures first-order definable in countably infinite finitely bounded homogeneous structures requires understanding the applicability of local-consistency methods in ...
Wrona, Micha?
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Quasi-adiabatic ternary CMOS logic
Electronics Letters, 1996 Adiabatic switching is one technique for designing low power IC. To diminish its expensive silicon area requirements a quasi-adiabatic ternary logic is proposed. The performances of a half adder using this logic have been obtained, showing a 65% area saving with respect to adiabatic binary logic.
D. Mateo, A. Rubio
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Micromachines, 2021 Due to the difficulties associated with scaling of silicon transistors, various technologies beyond binary logic processing are actively being investigated.
Furqan Zahoor +4 more
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Hardware-efficient on-line learning through pipelined truncated-error backpropagation in binary-state networks [PDF]
, 2017 Artificial neural networks (ANNs) trained using backpropagation are powerful learning architectures that have achieved state-of-the-art performance in various benchmarks.
Cauwenberghs, Gert +3 more
core +2 more sources