Results 211 to 220 of about 784 (245)

A Ternary Decision Diagram (TDD)-Based Synthesis Approach for Ternary Logic Circuits

Journal of The Institution of Engineers (India): Series B, 2019
Ternary reversible logic synthesis has started gaining the attention of researchers in recent years because of its distinct advantages over binary reversible logic synthesis. However, the existing methods for the synthesis of ternary reversible logic circuits are applicable only to smaller benchmarks.
P. Mercy Nesa Rani, Abhoy Kole, Kamalika Datta   +2 more
openaire   +1 more source

Encoder-Based Optimization of CNFET-Based Ternary Logic Circuits

IEEE Transactions on Nanotechnology, 2018
In existing CNFET-based design methodologies that are used to implement ternary logic circuits, ternary signals are first converted to binary signals, which are then passed through binary gates and an encoder to get the final ternary output. In a ternary circuit, encoder is used to convert intermediate binary signals to final ternary outputs.
Chetan Vudadha, Srinivasan Rajagopalan, Aditya Dusi, P. Sai Phaneendra, M. B. Srinivas   +4 more
openaire   +1 more source

Novel Approach to Design DPL-based Ternary Logic Circuits

2018 IEEE Electron Devices Kolkata Conference (EDKCON), 2018
Present paper introduces a novel strategy to design Double Pass-transistor Logic (DPL)based Ternary (base-3)logic circuit in favour of wave-pipelined applications. Ternary can be a feasible candidate to replace conventional binary (base-2)number system due to faster computation, reduced interconnect complexity, reduced fan-in/fan-out, less storage ...
Narendra Deo Singh, Rakesh Kumar Singh, Rahul Raj, Shivam Jyoti, Aloke Saha   +4 more
openaire   +1 more source

Ternary logic circuit design based on single electron transistors

Journal of Semiconductors, 2009
Based on the I–V characteristics and the function of adjustable threshold voltage of a single electron transistor (SET), we design the basic ternary logic circuits, which have been simulated by SPICE and their power and transient characteristics have been extensively analyzed. The simulation results indicate that the proposed circuits exhibit a simpler
Wu Gang, Cai Li, Li Qin
openaire   +1 more source

2:1 Multiplexer based design for ternary logic circuits

2013 IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia), 2013
This paper presents a design methodology using multiplexers to implement any ternary logic function with carbon nanotube field effect transistors (CNFETs). Ternary logic is one of the promising alternatives to conventional binary logic, since it is possible to achieve simplicity and low power dissipation due to the reduced circuit such as interconnects
Chetan Vudadha, Sowmya Katragadda, P Sai Phaneendra   +2 more
openaire   +1 more source

Null Convention Logic Circuits Using Balanced Ternary on SOI

2012
We propose and analyze novel Ternary logic circuits targeting an asynchronous Null Convention Logic (NCL) pipeline where the Null value (i.e. Data not valid) is used to make the pipeline self-synchronizing and delay insensitive. A balanced Ternary logic system is used, in which the logic set {High Data, Null, Low Data} maps to voltage levels {+VDD, 0V,
Sameh Andrawes, Paul Beckett
openaire   +1 more source

Logic circuits based on ternary parametrons

Soviet Radiophysics, 1966
V. P. Komolov, A. S. Roshal
openaire   +1 more source

Targeting galectin-driven regulatory circuits in cancer and fibrosis

Nature Reviews Drug Discovery, 2023
Karina V Mariño, Gabriel A Rabinovich
exaly  

Dynamical memristors for higher-complexity neuromorphic computing

Nature Reviews Materials, 2022
Suhas Kumar, Xinxin Wang, John Paul Strachan   +2 more
exaly  

Cntfet-Based Logical and Arithmetic Circuits in Unbalanced Ternary Logic

2023
Shams Ul Haq, Vijay Kumar Sharma
openaire   +1 more source