Results 241 to 250 of about 134,958 (300)

A novel intelligent control using RBFNN-class topper optimization for stability enhancement in hybrid standalone microgrid. [PDF]

Sci Rep
Myla AK, Gorantla SR.
europepmc   +1 more source

Two-Dimensions Vernier Time-to-Digital Converter

IEEE Journal of Solid-State Circuits, 2010
A two-dimensions Vernier algorithm applied to a time to digital converter (TDC) is presented. The solution proposed minimizes the length of the delay lines used to perform the digital conversion leading to a better efficiency compared to traditional linear approaches.
Luca Vercesi, Antonio Liscidini, Rinaldo Castello   +2 more
exaly   +4 more sources

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Time‐to‐digital converters—A comprehensive review

International Journal of Circuit Theory and Applications, 2021
SummaryThis work presents a comprehensive literature review on different topologies of time‐to‐digital converters (TDCs). A brief history, applications, classification, characterization, and working principle of each TDC are mentioned. A survey of both Field Programmable Gate Array (FPGA) and Application‐Specific Integrated Circuit (ASIC) architectures
Mahantesh P. Mattada, Hansraj Guhilot
openaire   +1 more source

Algorithmic time-to-digital converter

2013 NORCHIP, 2013
A novel time-to-digital converter is proposed. The TDC is based on a ring oscillator, and operates by switching the oscillation frequency in a cyclic manner. The operating principle resembles a cyclic/algorithmic ADC, where the quantization error is amplified and quantized recursively.
Keränen Pekka, Kostamovaara Juha Tapio
openaire   +1 more source

Successive Approximation Time-to-Digital Converters

2020 6th International Conference on Event-Based Control, Communication, and Signal Processing (EBCCSP), 2020
The successive approximation scheme belongs to fundamental and most successful methods of analog-to-digital conversion that has been implemented commercially for decades and is still used nowadays. Despite of a widespread use of successive approximation ADCs, the binary search scheme in time-to-digital converters (SA-TDCs) is adopted much rarely.
Jakub Szyduczynski, Dariusz Koscielnik, Konrad Jurasz, Marek Miskowicz   +3 more
openaire   +1 more source

A Tunable Dual-Edge Time-to-Digital Converter

2021 IEEE 29th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2021
Side-channel leakage poses a major security threat in multi-tenant FPGA environments. One tenant can instantiate a voltage fluctuation sensor that measures minute changes in the power distribution network (PDN) and infer information about co-tenant computation and data.
Colin Drewes, Steven Harris, Winnie Wang, Richard Appen, Olivia Weng, Ryan Kastner, William Hunter, Christopher McCarty, Dustin Richmond   +8 more
openaire   +1 more source

A REVIEW OF CMOS TIME-TO-DIGITAL CONVERTER

Journal of Circuits, Systems and Computers, 2014
Nowadays time-to-digital converter (TDC) is the most popular method of time measurement in many applications. The CMOS process, which gains an advantage over Emitter Coupled Logic (ECL) and GaAs in cost and portability, provides sufficient space for TDC development.
Zixuan Wang 0022, Cheng Huang 0005, Jianhui Wu 0001   +2 more
openaire   +1 more source

A Hybrid-Domain Two-Step Time-to-Digital Converter Using a Switch-Based Time-to-Voltage Converter and SAR ADC

IEEE Transactions on Circuits and Systems II: Express Briefs, 2015
In this brief, an energy-efficient time-to-digital converter (TDC) using a hybrid of time-and voltage-domain circuits is presented. The proposed TDC operates in two steps, i.e., first in the time domain by using a delay-line TDC and then in the voltage ...
Jungho Kim, Young－Hwa Kim, Kwangseok Kim   +2 more
exaly   +2 more sources