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Monolithic time-to-digital converter with 20ps resolution

ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705), 2004
We present a fully-integrated time-to-digital converter, in a standard 0.8/spl mu/m-CMOS technology, based on a cyclic pulse-shrinking design, that provides the lowest channel width of 20ps ever reported in literature for a single-shot measurements performed by monolithic circuits, with differential linearity errors lower than 10ps (less than 0.5LSB ...
GIUDICE, ANDREA   +3 more
openaire   +2 more sources

Developments in Time-to-Digital Converters during 2020

2021 7th International Conference on Event-Based Control, Communication, and Signal Processing (EBCCSP), 2021
Time-to-Digital Converters (TDCs) are important devices in many systems, such as Time-of-Flight, frequency locking, nuclear experiments and metrology, and quantum versions of all these. Therefore, research into TDCs is important to bring these technologies to wider audiences.
Scott Tancock   +2 more
openaire   +1 more source

A Multihit Time-to-Digital Converter Architecture on FPGA

IEEE Transactions on Instrumentation and Measurement, 2009
We present a multihit time-to-digital converter (TDC) architecture implemented in a field-programmable gate array (FPGA) with minimized timing overhead. The TDC circuit provides two-level fine-time interpolation. The fine interpolator is a matrix of Vernier delay cells interconnected in a topology to provide two propagation paths for the incoming data ...
Amir M. Amiri   +2 more
openaire   +2 more sources

A clockless time-to-digital converter

2010 IEEE 26-th Convention of Electrical and Electronics Engineers in Israel, 2010
Existing implementations of time-to-digital converters are based on the use of reference clocks. In the paper, a new method of clockless time-to-digital conversion (TDC) is proposed where the discretized time interval is first converted to the corresponding charge packet, and next processed in the charge domain by successive charge redistribution.
Dariusz Koscielnik, Marek Miskowicz
openaire   +1 more source

Time-to-Digital Converter Compiler for On-Chip Instrumentation

IEEE Design & Test, 2020
This article proposes an automatic compiler for an on-chip time-to-digital converter (TDC) that can be used for monitoring the on-chip operating conditions such as temperature and supply voltage. The proposed compiler adopts a resilient architecture and supports self-calibration and range adjustment.
Chia-Hua Wu   +3 more
openaire   +1 more source

A multistop time-to-digital converter

Nuclear Instruments and Methods in Physics Research, 1981
Abstract The article describes a multistop TDC with a resolution of 1 ns designed for time-of-flight mass spectrometry (maximum 128 μs) in heavy ion induced desorption experiments. The dead time of the device is 80 ns. An optional circuit for random rejection of stop signals allows observation of the second of two masses desorbed simultaneously ...
E. Festa, R. Sellem
openaire   +1 more source

Multisampling wave union time-to-digital converter

2020 6th International Conference on Event-Based Control, Communication, and Signal Processing (EBCCSP), 2020
A novel time-to-digital converter principle is presented that introduces multisampling capability to the wave union method. The design employs two wave union launchers for both start and stop signals. For test purposes the converter was implemented in Kintex-7 FPGA device (Xilinx). During the initial experimental verification a mean resolution (LSB) of
Pawel Kwiatkowski, Ryszard Szplet
openaire   +1 more source

The time-to-digital converter

Nuclear Instruments and Methods, 1969
Abstract A new instrument for time control and adjustment to be used in computer controlled multicounter experiments is presented. The proposed time-to-digital converter is a parallel unit to the ADC.
openaire   +1 more source

An All-Digital Capacitance-to-Digital Converter Based on Time-to-Digital Converter

2025 International Conference on Electronics, Information, and Communication (ICEIC)
Duo Sheng   +6 more
openaire   +3 more sources

Harmonic ring oscillator time-to-digital converter

2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015
A simple yet high performance time-to-digital converter (TDC) architecture is proposed in this paper. Its key advantage is its ability to sample-and-hold a time interval and thereafter oversample the stored quantity to provide sub-gate delay resolution and high linearity. The converter is fully digital, synthesizable from standard logic cells, and owes
Juan Pablo Caram   +2 more
openaire   +1 more source

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