Results 141 to 150 of about 3,473 (197)

High resolution distributed time-to-digital converter (TDC) in a White Rabbit network

Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 2014
Abstract The Large High Altitude Air Shower Observatory (LHAASO) project consists of a complex detector array with over 6000 detector nodes spreading over 1.2 km2 areas. The arrival times of shower particles are captured by time-to-digital converters (TDCs) in the detectors' frontend electronics, the arrival direction of the high energy cosmic ray ...
Weibin Pan, Guanghua Gong, Qiang Du, Hongming Li, Jianmin Li   +4 more
openaire   +2 more sources

A high-resolution multi-channel time-to-digital converter (TDC) for high-energy physics and biomedical imaging applications

2009 4th IEEE Conference on Industrial Electronics and Applications, 2009
This paper presents the design of a wide-range multi-channel time-to-digital converter (TDC) for high-energy physics and biomedical imaging applications. The TDC architecture is based on coarse-fine two-level conversion scheme. Double 10-bit gray counters are designed for coarse conversion while a multiphase sampling technology based on array of delay ...
null Gao Wu, null Gao Deyuan, null Wei Tingcun, Christine Hu-Guo, null Yann Hu   +4 more
openaire   +2 more sources

A 12-bit digital-to-time converter (DTC) with sub-ps-level resolution using current DAC and differential switch for time-to-digital converter (TDC)

2012 IEEE International Instrumentation and Measurement Technology Conference Proceedings, 2012
This paper describes a digital-to-time converter (DTC) architecture that can be used as interpolator in a time-to-digital converter (TDC). The new architecture of the DTC achieves adjustable sub-ps-level resolution with high linearity in ns-level dynamic range.
Mäntyniemi Antti, Kostamovaara Juha Tapio, Alahdab Salim   +2 more
openaire   +2 more sources

Area efficient time to digital converter (TDC) architecture with double ring-oscillator technique on FPGA for fluorescence measurement application

2011 IEEE Recent Advances in Intelligent Computational Systems, 2011
We present an area efficient Time to Digital Converter (TDC) yielding a high resolution of nearly 10ps. The TDC architecture reported in this paper comprises of coarse measurement using system clock and two controllable oscillators for fine resolution measurement.
Mahantesh P Mattad, Hansraj Guhilot, Rajanish K Kamat   +2 more
openaire   +2 more sources

On-Chip Real-Time Correction for a 20-ps Wave Union Time-To-Digital Converter (TDC) in a Field-Programmable Gate Array (FPGA)

IEEE Transactions on Nuclear Science, 2012
The latest delay chain-based FPGA TDCs can achieve resolutions around 10 ps. At such high levels of accuracy, delay chains become very sensitive to parasitic electromagnetic perturbations, including power supply voltage, temperature, and current surge. This paper describes how common-mode fast perturbation can deteriorate the spectra and make the root ...
Ji Qi, Hui Gong, Yinong Liu
openaire   +2 more sources

High resolution time-to-digital converter (TDC) implemented in field programmable gate array (FPGA) with compensated process voltage and temperature (PVT) variations

Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 2012
Abstract The paper presents and compares FPGA implementations of Time-to-Digital Converters (TDC) developed in the framework of the XNAP project, an international collaboration building Avalanche Photo Diode based area X-ray detectors. We are revisiting and presenting updated results achieved with recent components of two different TDC architectures ...
C. Hervé, J. Cerrai, T. Le Caër
openaire   +2 more sources

A High-Resolution (<formula formulatype="inline"> <tex Notation="TeX">${&lt; 10}~{\rm ps}$</tex></formula> RMS) 48-Channel Time-to-Digital Converter (TDC) Implemented in a Field Programmable Gate Array (FPGA)

IEEE Transactions on Nuclear Science, 2011
Eugen Bayer, Michael Traxler
openaire   +2 more sources

Review on the Evolution of Low-power and Highly-linear Time-to-Digital Converters - TDC

2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS), 2020
Time-to-digital converters (TDC) have been widely used in all-digital phase-locked loops (ADPLL). However, the TDC non-linearity and resolution have negatively impacted the ADPLL performance. A better integration between the TDC and ADPLL would improve the performance of the ADPLL, with a minimum increase in power consumption.
Lesley Ferreira, Mateus Moreira, Barbara Souza, Sandro Ferreira, Filipe Baumgratz, Sergio Bampi   +5 more
openaire   +1 more source

Design of a high-accuracy time-to-digital converter based on dual-edge signals

Journal of Instrumentation, 2023
Among numerous time-to-digital converters (TDC), tapped delay line (TDL) is the most commonly used architecture. However, its dead time of more than two cycles is inefficient for applications with high measurement rates.
Yuan Xiao, Huaguo Liang, Liyu Jin, Yuchuan Wang, Zhiwei Shao, Yue Wang, Yingchun Lu   +6 more
semanticscholar   +1 more source

Time-to-digital converter (TDC) based on startable ring oscillators and successive approximation

2014 NORCHIP, 2014
This paper presents a time-to-digital converter (TDC) architecture based on startable ring oscillators (SRO) and the cyclic time domain successive approximation principle. A ring oscillator is first used as a coarse interpolator within the cycle of the reference clock, after which the ring oscillator is used as a phase memory for the time domain ...
Mäntyniemi Antti, Kostamovaara Juha Tapio   +1 more
openaire   +1 more source