Analog Front-End ASIC for Compact Silicon Photomultiplier Sensor Interfaces in Mixed-Signal Systems. [PDF]
Badoni D +7 more
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Designing a time-to-digital converter using quantum-dot cellular automata nanotechnology. [PDF]
Modanlou S, Gholami M.
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A New Successive Time Balancing Time-to-Digital Conversion Method. [PDF]
Jurasz K +3 more
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Cross-Detection for Bubble-free Thermometer Codes and Dual-Side Monitoring for FPGA-Based High-Accuracy and High-Precision Time-to-Digital Converters. [PDF]
Lee D, Yi M, Kwon SI.
europepmc +1 more source
An FPGA-Based Event-Timing Front-End for Time-Resolved Sensing with Dual-Mode Experimental Characterization. [PDF]
Núñez J, Fiorelli R.
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A review of SPAD array chip design for direct time-of-flight LiDAR. [PDF]
Mo L, Huang S, Yang Y, Ren TL.
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Heterogeneous Tapped Delay-Line Time-to-Digital Converter on Artix-7 FPGA. [PDF]
Chen R, Chen P, Li K, Liu H.
europepmc +1 more source
Low-Jitter Clock Receivers for Fast Timing Applications. [PDF]
Grace C +3 more
europepmc +1 more source
Time-Domain ADC and Security Co-Design for SiP-Based Wireless SAW Sensor Readers. [PDF]
Mao Z, Li B, Peng L, Wei J.
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Methodology for Testing Key Parameters of Array-Level Small-Area Hafnium-Based Ferroelectric Capacitors Using Time-to-Digital Converter and Capacitance Calibration Circuits. [PDF]
Zhang D +8 more
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