Results 151 to 160 of about 772 (186)

Analysis and Correction of Noise Injection Due to Parallel-Output-Misalignment (POM) Effects in Ring-Type Time-to-Digital Converters (TDCs)

IEEE Journal of Solid-State Circuits, 2019
A phenomenon called parallel-output misalignment (POM), which intrinsically occurs in ring-type time-to-digital converters (TDCs) like gated-ring oscillator (GRO) or Vernier-ring TDCs, is discussed in this paper. We found that the phase noise caused by POM error may be larger than that due to quantization error by up to 22 dB or even more.
Tuoxin Wang, John W. M. Rogers, Krste Mitric   +2 more
openaire   +1 more source

Statistical efficiency of synchronous time-to-digital converters2013 IEEE Nordic-Mediterranean Workshop on Time-to-Digital Converters (NoMe TDC)

2013
In this paper, the Cramér-Rao Lower Bound (CRLB) on the variance of time interval duration estimators is derived for synchronous Time-to-Digital (TDC) converters, based on a coarse counter, keeping into account the effect of noise affecting the TDC clock period. The model has been validated using Montecarlo analysis.
G. De Angelis, MOSCHITTA, Antonio, CARBONE, Paolo   +2 more
openaire   +1 more source

Area efficient time to digital converter (TDC) architecture with double ring-oscillator technique on FPGA for fluorescence measurement application

2011 IEEE Recent Advances in Intelligent Computational Systems, 2011
We present an area efficient Time to Digital Converter (TDC) yielding a high resolution of nearly 10ps. The TDC architecture reported in this paper comprises of coarse measurement using system clock and two controllable oscillators for fine resolution measurement.
Mahantesh P Mattad, Hansraj Guhilot, Rajanish K Kamat   +2 more
openaire   +1 more source

Designing a 9.3μW Low-Power Time-to-Digital Converter (TDC) for a Time Assisted SAR ADC

2022 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI), 2022
Rodrigo N. Wuerdig, Bruno Canal, Tiago R. Balen, Sergio Bampi   +3 more
openaire   +1 more source

A Cyclic Vernier Digital-to-Time Converter for Time-Mode Successive Approximation TDC

, 2023
Daniel Junehee Lee, Fei Yuan, Yushi Zhou
openalex   +1 more source

A 4-GS/s 11.3-mW 7-bit Time-Based ADC With Folding Voltage-to-Time Converter and Pipelined TDC in 65-nm CMOS

IEEE Journal of Solid-State Circuits, 2021
Il-Min Yi
exaly  

Time-to-Digital Converters (TDC)

2002
openaire   +1 more source

Time-Interpolated Vernier Digital-to-Time Converter with Applications in Time-Mode SAR TDC

2023
Fei Yuan, Yushi Zhou
exaly  

Multi-phase sampling time-to-digital converter (TDC) for jitter measurement

2021
RAMARAJU RAVINDRARAJ, ELSHAFEY ELHOSSIN ABDELMONEM, ZAMANI MASOUD, ZAMANIDOOST ELHAM   +3 more
openaire   +1 more source

Energy Efficient All-Digital Phase Locked Loop Architecture Design on High Resolution Fast Clocking Time to Digital Converter (TDC) Using Model Prescient Control (MPC) Technique

, 2018
T. M. Sathish Kumar, P. S. Periasamy
openalex   +1 more source