Results 251 to 260 of about 39,193 (301)

A Hybrid-Domain Two-Step Time-to-Digital Converter Using a Switch-Based Time-to-Voltage Converter and SAR ADC

open access: yesIEEE Transactions on Circuits and Systems II: Express Briefs, 2015
In this brief, an energy-efficient time-to-digital converter (TDC) using a hybrid of time-and voltage-domain circuits is presented. The proposed TDC operates in two steps, i.e., first in the time domain by using a delay-line TDC and then in the voltage ...
Jungho Kim   +2 more
exaly   +2 more sources

A REVIEW OF CMOS TIME-TO-DIGITAL CONVERTER

Journal of Circuits, Systems and Computers, 2014
Nowadays time-to-digital converter (TDC) is the most popular method of time measurement in many applications. The CMOS process, which gains an advantage over Emitter Coupled Logic (ECL) and GaAs in cost and portability, provides sufficient space for TDC development.
Zixuan Wang 0022   +2 more
openaire   +1 more source

Monolithic time-to-digital converter with 20ps resolution

ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705), 2004
We present a fully-integrated time-to-digital converter, in a standard 0.8/spl mu/m-CMOS technology, based on a cyclic pulse-shrinking design, that provides the lowest channel width of 20ps ever reported in literature for a single-shot measurements performed by monolithic circuits, with differential linearity errors lower than 10ps (less than 0.5LSB ...
GIUDICE, ANDREA   +3 more
openaire   +2 more sources

A Tunable Dual-Edge Time-to-Digital Converter

2021 IEEE 29th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2021
Side-channel leakage poses a major security threat in multi-tenant FPGA environments. One tenant can instantiate a voltage fluctuation sensor that measures minute changes in the power distribution network (PDN) and infer information about co-tenant computation and data.
Colin Drewes   +8 more
openaire   +1 more source

A Multihit Time-to-Digital Converter Architecture on FPGA

IEEE Transactions on Instrumentation and Measurement, 2009
We present a multihit time-to-digital converter (TDC) architecture implemented in a field-programmable gate array (FPGA) with minimized timing overhead. The TDC circuit provides two-level fine-time interpolation. The fine interpolator is a matrix of Vernier delay cells interconnected in a topology to provide two propagation paths for the incoming data ...
Amir M. Amiri   +2 more
openaire   +2 more sources

A 1ps Resolution Two-Step Time-to-digital Converter Using Parallel Digital-to-time Converters

2021 9th International Symposium on Next Generation Electronics (ISNE), 2021
A two-step time-to-digital converter (TDC) based on digital-to-time converter (DTC) is proposed in this paper. This architecture uses DTC as delay cell, it changes DTC’s delay time by adjusting the DTC’s delay control words(DCW) , and sets the neighboring DTC’s delay time to keep the TDC’s resolution constant. The resolution can reach 1 picosecond. Two-
Yiheng Xi   +4 more
openaire   +1 more source

A clockless time-to-digital converter

2010 IEEE 26-th Convention of Electrical and Electronics Engineers in Israel, 2010
Existing implementations of time-to-digital converters are based on the use of reference clocks. In the paper, a new method of clockless time-to-digital conversion (TDC) is proposed where the discretized time interval is first converted to the corresponding charge packet, and next processed in the charge domain by successive charge redistribution.
Dariusz Koscielnik, Marek Miskowicz
openaire   +1 more source

Time-interleaved Analog-to-Digital Converters

2011
This book describes the research carried out by our PhD student Simon Louwsma at the University of Twente, The Netherlands in the field of high-speed Analogto- Digital (AD) converters. AD converters are crucial circuits for modern systems where information is stored or processed in digital form.
Louwsma, S.M.   +2 more
openaire   +1 more source

The time-to-digital converter

Nuclear Instruments and Methods, 1969
Abstract A new instrument for time control and adjustment to be used in computer controlled multicounter experiments is presented. The proposed time-to-digital converter is a parallel unit to the ADC.
openaire   +1 more source

A multistop time-to-digital converter

Nuclear Instruments and Methods in Physics Research, 1981
Abstract The article describes a multistop TDC with a resolution of 1 ns designed for time-of-flight mass spectrometry (maximum 128 μs) in heavy ion induced desorption experiments. The dead time of the device is 80 ns. An optional circuit for random rejection of stop signals allows observation of the second of two masses desorbed simultaneously ...
E. Festa, R. Sellem
openaire   +1 more source

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