Results 261 to 270 of about 39,193 (301)

Developments in Time-to-Digital Converters during 2020

2021 7th International Conference on Event-Based Control, Communication, and Signal Processing (EBCCSP), 2021
Time-to-Digital Converters (TDCs) are important devices in many systems, such as Time-of-Flight, frequency locking, nuclear experiments and metrology, and quantum versions of all these. Therefore, research into TDCs is important to bring these technologies to wider audiences.
Scott Tancock, John G. Rarity, Naim Dahnoun   +2 more
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Time-to-digital converters

2020
Integrated circuits, especially analog circuits, are highly sensitive to process, voltage, and temperature (PVT) variations. The information processed by analog circuits is often embedded in the amplitude of the waveforms, which requires circuits with high precision and high linearity. On the other hand, analog signal processing in time domain, such as
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A high resolution Time-to-Digital Converter (TDC) based on self-calibrated Digital-to-Time Converter (DTC)

2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), 2017
Based on the parallel DTCs as delay cells, a 4-bit TDC with adjustable 0.7ps∼1.4ps resolution and 11ps∼22ps dynamic range is proposed in this paper. In this design, an extremely high resolution DTC is presented, achieving 15.6fs delay per LSB. By utilizing 16 DTCs which are adjusted to have the same time interval among two neighboring DTCs, a highly ...
Tingbing Ouyang, Bo Wang, Lizhao Gao, Jiangtao Gu, Chao Zhang   +4 more
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Time-to-Digital Converter Compiler for On-Chip Instrumentation

IEEE Design & Test, 2020
This article proposes an automatic compiler for an on-chip time-to-digital converter (TDC) that can be used for monitoring the on-chip operating conditions such as temperature and supply voltage. The proposed compiler adopts a resilient architecture and supports self-calibration and range adjustment.
Chia-Hua Wu, Shi-Yu Huang, Yung-Fa Chou, Ding-Ming Kwai   +3 more
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Time-interleaved analog-to-digital converters

2008 IEEE Custom Integrated Circuits Conference, 2008
This paper provides a tutorial review of time-interleaved analog-to-digital converters. After explaining the impact of offset, gain, timing and other mismatches on converter performance, current solutions to the mismatch problems are presented. The paper concludes with a summary of the current-state-of-the art for time-interleaved analog-to-digital ...
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Harmonic ring oscillator time-to-digital converter

2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015
A simple yet high performance time-to-digital converter (TDC) architecture is proposed in this paper. Its key advantage is its ability to sample-and-hold a time interval and thereafter oversample the stored quantity to provide sub-gate delay resolution and high linearity. The converter is fully digital, synthesizable from standard logic cells, and owes
Juan Pablo Caram, Jeff Galloway, J. Stevenson Kenney   +2 more
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Time-interleaved analog-to-digital converters

2009
This thesis describes the feasibility of an analog-to-digital converter (ADC) with a sample-rate of 1-2 GS/s, a resolution of 8-10 bits, and a state-of-the-art power efficiency of less than 1 pJ/conversion step. The time-interleaved architecture exploits parallelism to increase the sample-rate while maintaining good power efficiency, and therefore it ...
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Background on Time-to-Digital Converters

2015
For the first time, a third-order noise shaping concept has been successfully implemented in the design of time-to-digital converters (TDCs). Two 1-1-1 multistage noise shaping (MASH) \(\Delta\Sigma\) TDCs are presented in this chapter. Third-order time domain noise shaping has been adopted by the TDCs to achieve better than 6 ps resolution.
Ying Cao, Paul Leroux, Michiel Steyaert
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Multisampling wave union time-to-digital converter

2020 6th International Conference on Event-Based Control, Communication, and Signal Processing (EBCCSP), 2020
A novel time-to-digital converter principle is presented that introduces multisampling capability to the wave union method. The design employs two wave union launchers for both start and stop signals. For test purposes the converter was implemented in Kintex-7 FPGA device (Xilinx). During the initial experimental verification a mean resolution (LSB) of
Pawel Kwiatkowski, Ryszard Szplet
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Time-to-Digital Converters

2013
Dynamic development in science and technology in the second half of the twentieth century caused, among others, an increase in the interest in methods and techniques for precise measurement of time interval that elapses between two physical events.
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