Results 261 to 270 of about 197,559 (299)

High resolution time-to-digital converters

Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 1992
Abstract High resolution TDC chips use active delays as time reference and flip-flops as comparators, instead of switched current sources and ADCs as implemented in analog designs. As a result, a straight encoding is obtained, allowing time binning down to 50 ps, taking advantage of the high accuracy of IC processes.
openaire   +1 more source

All-digital pulse-expansion-based CMOS digital-to-time converter

Review of Scientific Instruments, 2017
This paper presents a new all-digital CMOS digital-to-time converter (DTC) based on pulse expansion. Pulse expansion is achieved using an all-digital pulse-mixing scheme that can effectively improve the timing resolution and enable the DTC to be concise.
Chun-Chi, Chen, Che-Hsun, Chu
openaire   +2 more sources

A high resolution Time-to-Digital Converter (TDC) based on self-calibrated Digital-to-Time Converter (DTC)

2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), 2017
Based on the parallel DTCs as delay cells, a 4-bit TDC with adjustable 0.7ps∼1.4ps resolution and 11ps∼22ps dynamic range is proposed in this paper. In this design, an extremely high resolution DTC is presented, achieving 15.6fs delay per LSB. By utilizing 16 DTCs which are adjusted to have the same time interval among two neighboring DTCs, a highly ...
Tingbing Ouyang, Bo Wang, Lizhao Gao, Jiangtao Gu, Chao Zhang   +4 more
openaire   +1 more source

Time-to-Digital Converter Basics

2010
On the basis of a generic mixed-signal system the scaling difficulties of analog and mixed-signal circuits based on a signal representation in the voltage domain are discussed for nanometer CMOS technologies. Therewith, the advantages of a signal representation in the time domain are emphasized.
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Single Shot Time-to-Digital Converters

2018
This chapter discusses the system level design and physical implementation of a single-shot TDC. In Chap. 2, various topologies were discussed to implement a Time-to-Digital converter, each of them having its own advantages and disadvantages. Since the application scope of this work is high-energy physics and space, the most important constraints are ...
Jeffrey Prinzie, Michiel Steyaert, Paul Leroux   +2 more
openaire   +1 more source

Time-interleaved analog-to-digital converters

2008 IEEE Custom Integrated Circuits Conference, 2008
This paper provides a tutorial review of time-interleaved analog-to-digital converters. After explaining the impact of offset, gain, timing and other mismatches on converter performance, current solutions to the mismatch problems are presented. The paper concludes with a summary of the current-state-of-the art for time-interleaved analog-to-digital ...
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Time-to-digital converters based on RSFQ digital counters

IEEE Transactions on Appiled Superconductivity, 1997
We have designed, fabricated, and successfully tested a Time-to-Digital converter (TDC). The TDC circuit consists of superconductive counters based on toggle flip-flops with destructive readout, shift registers, parallel-to-serial converters, and pulse detectors. The value of the counter is latched while the counter is operating at full speed.
O.A. Mukhanov, S.V. Rylov
openaire   +1 more source

Background on Time-to-Digital Converters

2015
For the first time, a third-order noise shaping concept has been successfully implemented in the design of time-to-digital converters (TDCs). Two 1-1-1 multistage noise shaping (MASH) \(\Delta\Sigma\) TDCs are presented in this chapter. Third-order time domain noise shaping has been adopted by the TDCs to achieve better than 6 ps resolution.
Ying Cao, Paul Leroux, Michiel Steyaert
openaire   +1 more source

Automatic calibration of Time to Digital Converter

2009 IEEE Intrumentation and Measurement Technology Conference, 2009
Due to its restricted usage and accuracy in measuring extremely short interval of time, TDC (time to digital converter) embedded measurement devices are relatively expansive. Even if new applications are being developed in daily life as well as in industry, the cost condition of TDC based measurement systems needs to be improved.
null Young-Ho Lee, null Kwang-Hee Lee, null Jong-wan Seo, null Dong-Hwan Lim, null Sang-Hwa Lee, null Jin-Myoung Kim, null Tae-Yong Kuc, null Seung-Min Baek, null Ki-Min Lee, S. J. Jung, null Seung-Ho Baeg, M. H. Baeg   +11 more
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A wide-range time-to-digital converter

Nuclear Instruments and Methods, 1978
Abstract The design and performance of a wide-range multi-stop time-to-digital converter (TDC) with a minimum time increment of 0.1 μs are described. The differential non-linearity of the TDC is improved to be less than 0.6% by the use of a strobe signal synchronized to the clock pulse.
T. Numao, T. Kobayashi, Y. Yoshida
openaire   +1 more source