Results 71 to 80 of about 149,459 (248)
Using novel SiO2 surface passivation and ultraviolet (UV) light anneal, a 12 nm thick SnO p-type FET (pFET) shows hole effective mobilities (µeff) of more than 100 cm2/V·s and 31.1 cm2/V·s at hole densities (Qh) of 1 × 1011 and 5 × 1012 cm−2 ...
Kuan-Chieh Chen +3 more
doaj +1 more source
This study introduces a novel chloro boron subphthalocyanine/polymer blend OFET sensor achieving 0.005 ppb limit of detection for ammonia at room temperature and high selectivity against similar amines. An original theoretical framework is proposed to describe the sensing mechanism, relating analyte molecular volume and Lewis basicity to sensor ...
Kavinraaj Ella Elangovan +6 more
wiley +1 more source
Appendix E: Termination of a Transistor Port with a Load [PDF]
W.A. Davis
openalex +1 more source
Conductive Bonding and System Architectures for High‐Performance Flexible Electronics
This review outlines bonding technologies and structural design strategies that support high‐performance flexible and stretchable electronics. Bonding approaches such as surface‐activated bonding and anisotropic conductive films, together with system‐level architectures including buffer layers and island‐bridge structures, possess distinct mechanical ...
Kazuma Nakajima, Kenjiro Fukuda
wiley +1 more source
Indirect Thermographic Measurement of the Temperature of a Transistor Die during Pulse Operation
This paper presents aspects related to the indirect thermographic measurement of a C2M0280120D transistor in pulse mode. The tested transistor was made on the basis of silicon carbide and is commonly used in many applications.
Arkadiusz Hulewicz +2 more
doaj +1 more source
Applying a high electric field to a doped organic semiconductor heats up the charge carrier distribution beyond the lattice temperature, enhancing conductivity. It is shown that the associated effective temperature can be used to extract the effective localization length, which is a characteristic length scale of charge transport and provides ...
Morteza Shokrani +4 more
wiley +1 more source
Reducing power consumption in spintronic memory remains a major challenge due to the need for high current densities. A bilayer of gadolinium and holmium iron garnets enables purely temperature‐induced, nonvolatile magnetic switching with bistable states within a ±25 K range. This approach achieves up to 66‐fold lower energy use than current spin–orbit
Junseok Kim +3 more
wiley +1 more source
A high performance gate-all-around (GAA) junctionless (JL) polycrystalline silicon nanowire (poly-Si NW) transistor with channel width of 12 nm, channel thickness of 45 nm, and gate length of 20 nm has been successfully demonstrated, based on a ...
Tung-Yu Liu +2 more
doaj +1 more source
Integration of Low‐Voltage Nanoscale MoS2 Memristors on CMOS Microchips
This article presents the first monolithic integration of nanoscale MoS2‐based memristors into the back‐end‐of‐line of foundry‐fabricated CMOS microchips in a one‐transistor‐one‐resistor (1T1R) architecture. The MoS2‐based 1T1R cells exhibit forming‐free, nonvolatile resistive switching with ultra‐low operating voltages, low cycle‐to‐cycle variability ...
Jimin Lee +16 more
wiley +1 more source
Nanoscale‐grooved indium gallium oxide (IGO) semiconductors, patterned via thermal nanoimprint lithography (NIL) using CD/DVD templates, are integrated into electrolyte‐gated transistor biosensors to overcome Debye length limitations. Precisely engineered concave–convex nanostructures modulate local electrostatic potentials, extend the effective Debye ...
Jong Yu Song +5 more
wiley +1 more source

